#include  "msp430x44x.h"
;******************************************************************************
;   MSP-FET430P440 Demo - FLL+ MCLK configured to operate from XT2 HF XTAL 
;
;   Description; Proper selection of an external HF XTAL for MCLK is 
;   demonstrated using XT2 OSC. XT2OF is polled until the XTAL is stable - 
;   only then is MCLK sourced by XT2.  MCLK is buffered on P1.4.
;   //** HF XTAL NOT INSTALLED ON FET **//
;
;                 MSP430F449
;             -----------------
;         /|\|              XIN|-  
;          | |                 |  
;          --|RST          XOUT|-
;            |                 |
;            |            XT2IN|-  
;            |                 | XTAL (455k - 8Mhz) 
;            |           XT2OUT|-
;            |                 |
;            |             P1.1|-->MCLK = XTAL
;
;   M.Buccini
;   Texas Instruments, Inc
;   January 2002
;******************************************************************************
;------------------------------------------------------------------------------ 
            ORG     01100h                  ; Program Start
;------------------------------------------------------------------------------ 
RESET       mov.w   #0A00h,SP               ; Initialize '449 stackpointer
StopWDT     mov.w   #WDTPW+WDTHOLD,&WDTCTL  ; Stop WDT
SetupP1     bis.b   #002h,&P1DIR            ; P1.1 output direction
            bis.b   #002h,&P1SEL            ; P1.1 option select
                                            ;           
SetupOSC    bic.b   #XT2OFF,&FLL_CTL1       ; Enable XT2 OSC
SetupOsc    bic.b   #XT2OF,&FLL_CTL0        ; Clear XT2 OSC fault flag 
            mov.w   #0FFh,R15               ; R15 = Delay 
SetupOsc1   dec.w   R15                     ; Additional delay to ensure start 
            jnz     SetupOsc1               ;
            bit.b   #XT2OF,&FLL_CTL0        ; XT2 OSC fault flag set? 
            jnz     SetupOsc                ; OSC Fault, clear flag again 
            bic.b   #OFIFG,&IFG1            ; Safe, clear OSC fault flag 
            bis.b   #SELM1,&FLL_CTL1        ; MCLK = XT2
                                            ;           
Mainloop    jmp     Mainloop                ; 
                                            ;           
;----------------------------------------------------------------------------- 
;           Interrupt Vectors Used MSP430x44x         
;----------------------------------------------------------------------------- 
            ORG     0FFFEh                  ; MSP430 RESET Vector
            DW      RESET                   ; 
            END     
