#ifndef __AT90S1200_h
#define __AT90S1200_h

// Interrupt vectors

#define RESET_vect 0x0000
#define INT0_vect 0x0002
#define TIMER0_OVF_vect 0x0004
#define ANA_COMP_vect 0x0006

// I/O addresses


sfrb SREG = 0x5f;

sfrb GIMSK = 0x5b;
#define INT0 6

sfrb TIMSK = 0x59;
#define TOIE0 1

sfrb TIFR = 0x58;
#define TOV0 1

sfrb MCUCR = 0x55;
#define ISC00 0
#define ISC01 1
#define SM 4
#define SE 5

sfrb TCCR0 = 0x53;
#define CS00 0
#define CS01 1
#define CS02 2

sfrb TCNT0 = 0x52;
#define TCNT00 0
#define TCNT01 1
#define TCNT02 2
#define TCNT03 3
#define TCNT04 4
#define TCNT05 5
#define TCNT06 6
#define TCNT07 7

sfrb WDTCR = 0x41;
#define WDP0 0
#define WDP1 1
#define WDP2 2
#define WDE 3

sfrb EEAR = 0x3e;
#define EEAR0 0
#define EEAR1 1
#define EEAR2 2
#define EEAR3 3
#define EEAR4 4
#define EEAR5 5
#define EEAR6 6

sfrb EEDR = 0x3d;
#define EEDR0 0
#define EEDR1 1
#define EEDR2 2
#define EEDR3 3
#define EEDR4 4
#define EEDR5 5
#define EEDR6 6
#define EEDR7 7

sfrb EECR = 0x3c;
#define EERE 0
#define EEWE 1

sfrb PORTB = 0x38;
#define PORTB0 0
#define PORTB1 1
#define PORTB2 2
#define PORTB3 3
#define PORTB4 4
#define PORTB5 5
#define PORTB6 6
#define PORTB7 7

sfrb DDRB = 0x37;
#define DDB0 0
#define DDB1 1
#define DDB2 2
#define DDB3 3
#define DDB4 4
#define DDB5 5
#define DDB6 6
#define DDB7 7

sfrb PINB = 0x36;
#define PINB0 0
#define PINB1 1
#define PINB2 2
#define PINB3 3
#define PINB4 4
#define PINB5 5
#define PINB6 6
#define PINB7 7

sfrb PORTD = 0x32;
#define PORTD0 0
#define PORTD1 1
#define PORTD2 2
#define PORTD3 3
#define PORTD4 4
#define PORTD5 5
#define PORTD6 6

sfrb DDRD = 0x31;
#define DDD0 0
#define DDD1 1
#define DDD2 2
#define DDD3 3
#define DDD4 4
#define DDD5 5
#define DDD6 6

sfrb PIND = 0x30;
#define PIND0 0
#define PIND1 1
#define PIND2 2
#define PIND3 3
#define PIND4 4
#define PIND5 5
#define PIND6 6

sfrb ACSR = 0x28;
#define ACIS0 0
#define ACIS1 1
#define ACIE 3
#define ACI 4
#define ACO 5
#define ACD 7

#endif