#ifndef __AT90PWM3_h
#define __AT90PWM3_h

// Interrupt vectors

#define RESET_vect 0x0000
#define PSC2_CAPT_vect 0x0002
#define PSC2_EC_vect 0x0004
#define PSC1_CAPT_vect 0x0006
#define PSC1_EC_vect 0x0008
#define PSC0_CAPT_vect 0x000a
#define PSC0_EC_vect 0x000c
#define ANALOG_COMP_0_vect 0x000e
#define ANALOG_COMP_1_vect 0x0010
#define ANALOG_COMP_2_vect 0x0012
#define INT0_vect 0x0014
#define TIMER1_CAPT_vect 0x0016
#define TIMER1_COMPA_vect 0x0018
#define TIMER1_COMPB_vect 0x001a
#define TIMER1_OVF_vect 0x001e
#define TIMER0_COMP_A_vect 0x0020
#define TIMER0_OVF_vect 0x0022
#define ADC_vect 0x0024
#define INT1_vect 0x0026
#define SPI_STC_vect 0x0028
#define USART_RX_vect 0x002a
#define USART_UDRE_vect 0x002c
#define USART_TX_vect 0x002e
#define INT2_vect 0x0030
#define WDT_vect 0x0032
#define EE_READY_vect 0x0034
#define TIMER0_COMPB_vect 0x0036
#define INT3_vect 0x0038
#define SPM_READY_vect 0x003e

// I/O addresses


sfrb PICR2H = 0xff;
#define PICR2_8 0
#define PICR2_9 1
#define PICR2_10 2
#define PICR2_11 3

sfrb PICR2L = 0xfe;
#define PICR2_0 0
#define PICR2_1 1
#define PICR2_2 2
#define PICR2_3 3
#define PICR2_4 4
#define PICR2_5 5
#define PICR2_6 6
#define PICR2_7 7

sfrw PICR2W = 0xfe;

sfrb PFRC2B = 0xfd;
#define PRFM2B0 0
#define PRFM2B1 1
#define PRFM2B2 2
#define PRFM2B3 3
#define PFLTE2B 4
#define PELEV2B 5
#define PISEL2B 6
#define PCAE2B 7

sfrb PFRC2A = 0xfc;
#define PRFM2A0 0
#define PRFM2A1 1
#define PRFM2A2 2
#define PRFM2A3 3
#define PFLTE2A 4
#define PELEV2A 5
#define PISEL2A 6
#define PCAE2A 7

sfrb PCTL2 = 0xfb;
#define PRUN2 0
#define PCCYC2 1
#define PARUN2 2
#define PAOC2A 3
#define PAOC2B 4
#define PBFM2 5
#define PPRE20 6
#define PPRE21 7

sfrb PCNF2 = 0xfa;
#define POME2 0
#define PCLKSEL2 1
#define POP2 2
#define PMODE20 3
#define PMODE21 4
#define PLOCK2 5
#define PALOCK2 6
#define PFIFTY2 7

sfrb OCR2RBH = 0xf9;
#define OCR2RB_8 0
#define OCR2RB_9 1
#define OCR2RB_10 2
#define OCR2RB_11 3
#define OCR2RB_12 4
#define OCR2RB_13 5
#define OCR2RB_14 6
#define OCR2RB_15 7

sfrb OCR2RBL = 0xf8;
#define OCR2RB_0 0
#define OCR2RB_1 1
#define OCR2RB_2 2
#define OCR2RB_3 3
#define OCR2RB_4 4
#define OCR2RB_5 5
#define OCR2RB_6 6
#define OCR2RB_7 7

sfrw OCR2RBW = 0xf8;

sfrb OCR2SBH = 0xf7;
#define OCR2SB_8 0
#define OCR2SB_9 1
#define OCR2SB_10 2
#define OCR2SB_11 3

sfrb OCR2SBL = 0xf6;
#define OCR2SB_0 0
#define OCR2SB_1 1
#define OCR2SB_2 2
#define OCR2SB_3 3
#define OCR2SB_4 4
#define OCR2SB_5 5
#define OCR2SB_6 6
#define OCR2SB_7 7

sfrw OCR2SBW = 0xf6;

sfrb OCR2RAH = 0xf5;
#define OCR2RA_8 0
#define OCR2RA_9 1
#define OCR2RA_10 2
#define OCR2RA_11 3

sfrb OCR2RAL = 0xf4;
#define OCR2RA_0 0
#define OCR2RA_1 1
#define OCR2RA_2 2
#define OCR2RA_3 3
#define OCR2RA_4 4
#define OCR2RA_5 5
#define OCR2RA_6 6
#define OCR2RA_7 7

sfrw OCR2RAW = 0xf4;

sfrb OCR2SAH = 0xf3;
#define OCR2SA_8 0
#define OCR2SA_9 1
#define OCR2SA_10 2
#define OCR2SA_11 3

sfrb OCR2SAL = 0xf2;
#define OCR2SA_0 0
#define OCR2SA_1 1
#define OCR2SA_2 2
#define OCR2SA_3 3
#define OCR2SA_4 4
#define OCR2SA_5 5
#define OCR2SA_6 6
#define OCR2SA_7 7

sfrw OCR2SAW = 0xf2;

sfrb POM2 = 0xf1;
#define POMV2A0 0
#define POMV2A1 1
#define POMV2A2 2
#define POMV2A3 3
#define POMV2B0 4
#define POMV2B1 5
#define POMV2B2 6
#define POMV2B3 7

sfrb PSOC2 = 0xf0;
#define POEN2A 0
#define POEN2C 1
#define POEN2B 2
#define POEN2D 3
#define PSYNC2_0 4
#define PSYNC2_1 5
#define POS22 6
#define POS23 7

sfrb PICR1H = 0xef;
#define PICR1_8 0
#define PICR1_9 1
#define PICR1_10 2
#define PICR1_11 3

sfrb PICR1L = 0xee;
#define PICR1_0 0
#define PICR1_1 1
#define PICR1_2 2
#define PICR1_3 3
#define PICR1_4 4
#define PICR1_5 5
#define PICR1_6 6
#define PICR1_7 7

sfrw PICR1W = 0xee;

sfrb PFRC1B = 0xed;
#define PRFM1B0 0
#define PRFM1B1 1
#define PRFM1B2 2
#define PRFM1B3 3
#define PFLTE1B 4
#define PELEV1B 5
#define PISEL1B 6
#define PCAE1B 7

sfrb PFRC1A = 0xec;
#define PRFM1A0 0
#define PRFM1A1 1
#define PRFM1A2 2
#define PRFM1A3 3
#define PFLTE1A 4
#define PELEV1A 5
#define PISEL1A 6
#define PCAE1A 7

sfrb PCTL1 = 0xeb;
#define PRUN1 0
#define PCCYC1 1
#define PARUN1 2
#define PAOC1A 3
#define PAOC1B 4
#define PBFM1 5
#define PPRE10 6
#define PPRE11 7

sfrb PCNF1 = 0xea;
#define PCLKSEL1 1
#define POP1 2
#define PMODE10 3
#define PMODE11 4
#define PLOCK1 5
#define PALOCK1 6
#define PFIFTY1 7

sfrb OCR1RBH = 0xe9;
#define OCR1RB_8 0
#define OCR1RB_9 1
#define OCR1RB_10 2
#define OCR1RB_11 3
#define OCR1RB_12 4
#define OCR1RB_13 5
#define OCR1RB_14 6
#define OCR1RB_15 7

sfrb OCR1RBL = 0xe8;
#define OCR1RB_0 0
#define OCR1RB_1 1
#define OCR1RB_2 2
#define OCR1RB_3 3
#define OCR1RB_4 4
#define OCR1RB_5 5
#define OCR1RB_6 6
#define OCR1RB_7 7

sfrw OCR1RBW = 0xe8;

sfrb OCR1SBH = 0xe7;
#define OCR1SB_8 0
#define OCR1SB_9 1
#define OCR1SB_10 2
#define OCR1SB_11 3

sfrb OCR1SBL = 0xe6;
#define OCR1SB_0 0
#define OCR1SB_1 1
#define OCR1SB_2 2
#define OCR1SB_3 3
#define OCR1SB_4 4
#define OCR1SB_5 5
#define OCR1SB_6 6
#define OCR1SB_7 7

sfrw OCR1SBW = 0xe6;

sfrb OCR1RAH = 0xe5;
#define OCR1RA_8 0
#define OCR1RA_9 1
#define OCR1RA_10 2
#define OCR1RA_11 3

sfrb OCR1RAL = 0xe4;
#define OCR1RA_0 0
#define OCR1RA_1 1
#define OCR1RA_2 2
#define OCR1RA_3 3
#define OCR1RA_4 4
#define OCR1RA_5 5
#define OCR1RA_6 6
#define OCR1RA_7 7

sfrw OCR1RAW = 0xe4;

sfrb OCR1SAH = 0xe3;
#define OCR1SA_8 0
#define OCR1SA_9 1
#define OCR1SA_10 2
#define OCR1SA_11 3

sfrb OCR1SAL = 0xe2;
#define OCR1SA_0 0
#define OCR1SA_1 1
#define OCR1SA_2 2
#define OCR1SA_3 3
#define OCR1SA_4 4
#define OCR1SA_5 5
#define OCR1SA_6 6
#define OCR1SA_7 7

sfrw OCR1SAW = 0xe2;

sfrb PSOC1 = 0xe0;
#define POEN1A 0
#define POEN1B 2
#define PSYNC1_0 4
#define PSYNC1_1 5

sfrb PICR0H = 0xdf;
#define PICR0_8 0
#define PICR0_9 1
#define PICR0_10 2
#define PICR0_11 3

sfrb PICR0L = 0xde;
#define PICR0_0 0
#define PICR0_1 1
#define PICR0_2 2
#define PICR0_3 3
#define PICR0_4 4
#define PICR0_5 5
#define PICR0_6 6
#define PICR0_7 7

sfrw PICR0W = 0xde;

sfrb PFRC0B = 0xdd;
#define PRFM0B0 0
#define PRFM0B1 1
#define PRFM0B2 2
#define PRFM0B3 3
#define PFLTE0B 4
#define PELEV0B 5
#define PISEL0B 6
#define PCAE0B 7

sfrb PFRC0A = 0xdc;
#define PRFM0A0 0
#define PRFM0A1 1
#define PRFM0A2 2
#define PRFM0A3 3
#define PFLTE0A 4
#define PELEV0A 5
#define PISEL0A 6
#define PCAE0A 7

sfrb PCTL0 = 0xdb;
#define PRUN0 0
#define PCCYC0 1
#define PARUN0 2
#define PAOC0A 3
#define PAOC0B 4
#define PBFM0 5
#define PPRE00 6
#define PPRE01 7

sfrb PCNF0 = 0xda;
#define PCLKSEL0 1
#define POP0 2
#define PMODE00 3
#define PMODE01 4
#define PLOCK0 5
#define PALOCK0 6
#define PFIFTY0 7

sfrb OCR0RBH = 0xd9;
#define OCR0RB_8 0
#define OCR0RB_9 1
#define OCR0RB_00 2
#define OCR0RB_01 3
#define OCR0RB_02 4
#define OCR0RB_03 5
#define OCR0RB_04 6
#define OCR0RB_05 7

sfrb OCR0RBL = 0xd8;
#define OCR0RB_0 0
#define OCR0RB_1 1
#define OCR0RB_2 2
#define OCR0RB_3 3
#define OCR0RB_4 4
#define OCR0RB_5 5
#define OCR0RB_6 6
#define OCR0RB_7 7

sfrw OCR0RBW = 0xd8;

sfrb OCR0SBH = 0xd7;
#define OCR0SB_8 0
#define OCR0SB_9 1
#define OCR0SB_00 2
#define OCR0SB_01 3

sfrb OCR0SBL = 0xd6;
#define OCR0SB_0 0
#define OCR0SB_1 1
#define OCR0SB_2 2
#define OCR0SB_3 3
#define OCR0SB_4 4
#define OCR0SB_5 5
#define OCR0SB_6 6
#define OCR0SB_7 7

sfrw OCR0SBW = 0xd6;

sfrb OCR0RAH = 0xd5;
#define OCR0RA_8 0
#define OCR0RA_9 1
#define OCR0RA_00 2
#define OCR0RA_01 3

sfrb OCR0RAL = 0xd4;
#define OCR0RA_0 0
#define OCR0RA_1 1
#define OCR0RA_2 2
#define OCR0RA_3 3
#define OCR0RA_4 4
#define OCR0RA_5 5
#define OCR0RA_6 6
#define OCR0RA_7 7

sfrw OCR0RAW = 0xd4;

sfrb OCR0SAH = 0xd3;
#define OCR0SA_8 0
#define OCR0SA_9 1
#define OCR0SA_00 2
#define OCR0SA_01 3

sfrb OCR0SAL = 0xd2;
#define OCR0SA_0 0
#define OCR0SA_1 1
#define OCR0SA_2 2
#define OCR0SA_3 3
#define OCR0SA_4 4
#define OCR0SA_5 5
#define OCR0SA_6 6
#define OCR0SA_7 7

sfrw OCR0SAW = 0xd2;

sfrb PSOC0 = 0xd0;
#define POEN0A 0
#define POEN0B 2
#define PSYNC00 4
#define PSYNC01 5

sfrb EUDR = 0xce;
#define EUDR0 0
#define EUDR1 1
#define EUDR2 2
#define EUDR3 3
#define EUDR4 4
#define EUDR5 5
#define EUDR6 6
#define EUDR7 7

sfrb MUBRRH = 0xcd;
#define MUBRR8 0
#define MUBRR9 1
#define MUBRR10 2
#define MUBRR11 3
#define MUBRR12 4
#define MUBRR13 5
#define MUBRR14 6
#define MUBRR15 7

sfrb MUBRRL = 0xcc;
#define MUBRR0 0
#define MUBRR1 1
#define MUBRR2 2
#define MUBRR3 3
#define MUBRR4 4
#define MUBRR5 5
#define MUBRR6 6
#define MUBRR7 7

sfrw MUBRRW = 0xcc;

sfrb EUCSRC = 0xca;
#define STP0 0
#define STP1 1
#define F1617 2
#define FEM 3

sfrb EUCSRB = 0xc9;
#define BODR 0
#define EMCH 1
#define EUSBS 3
#define EUSART 4

sfrb EUCSRA = 0xc8;
#define URxS0 0
#define URxS1 1
#define URxS2 2
#define URxS3 3
#define UTxS0 4
#define UTxS1 5
#define UTxS2 6
#define UTxS3 7

sfrb UDR = 0xc6;
#define UDR0 0
#define UDR1 1
#define UDR2 2
#define UDR3 3
#define UDR4 4
#define UDR5 5
#define UDR6 6
#define UDR7 7

sfrb UBRRH = 0xc5;
#define UBRR8 0
#define UBRR9 1
#define UBRR10 2
#define UBRR11 3

sfrb UBRRL = 0xc4;
#define UBRR0 0
#define UBRR1 1
#define UBRR2 2
#define UBRR3 3
#define UBRR4 4
#define UBRR5 5
#define UBRR6 6
#define UBRR7 7

sfrw UBRRW = 0xc4;

sfrb UCSRC = 0xc2;
#define UCPOL 0
#define UCSZ0 1
#define UCSZ1 2
#define USBS 3
#define UPM0 4
#define UPM1 5
#define UMSEL0 6

sfrb UCSRB = 0xc1;
#define TXB8 0
#define RXB8 1
#define UCSZ2 2
#define TXEN 3
#define RXEN 4
#define UDRIE 5
#define TXCIE 6
#define RXCIE 7

sfrb UCSRA = 0xc0;
#define MPCM 0
#define U2X 1
#define UPE 2
#define DOR 3
#define FE 4
#define UDRE 5
#define TXC 6
#define RXC 7

sfrb AC2CON = 0xaf;
#define AC2M0 0
#define AC2M1 1
#define AC2M2 2
#define AC2SADE 3
#define AC2IS0 4
#define AC2IS1 5
#define AC2IE 6
#define AC2EN 7

sfrb AC1CON = 0xae;
#define AC1M0 0
#define AC1M1 1
#define AC1M2 2
#define AC1ICE 3
#define AC1IS0 4
#define AC1IS1 5
#define AC1IE 6
#define AC1EN 7

sfrb AC0CON = 0xad;
#define AC0M0 0
#define AC0M1 1
#define AC0M2 2
#define AC0IS0 4
#define AC0IS1 5
#define AC0IE 6
#define AC0EN 7

sfrb DACH = 0xac;
#define DACH0 0
#define DACH1 1
#define DACH2 2
#define DACH3 3
#define DACH4 4
#define DACH5 5
#define DACH6 6
#define DACH7 7

sfrb DACL = 0xab;
#define DACL1 1
#define DACL2 2
#define DACL3 3
#define DACL4 4
#define DACL5 5
#define DACL6 6
#define DACL7 7

sfrw DACW = 0xab;

sfrb DACON = 0xaa;
#define DAEN 0
#define DAOE 1
#define DALA 2
#define DATS0 4
#define DATS1 5
#define DATS2 6
#define DAATE 7

sfrb PIM2 = 0xa5;
#define PEOPE2 0
#define PEVE2A 3
#define PEVE2B 4
#define PSEIE2 5

sfrb PIFR2 = 0xa4;
#define PEOP2 0
#define PRN20 1
#define PRN21 2
#define PEV2A 3
#define PEV2B 4
#define PSEI2 5

sfrb PIM1 = 0xa3;
#define PEOPE1 0
#define PEVE1A 3
#define PEVE1B 4
#define PSEIE1 5

sfrb PIFR1 = 0xa2;
#define PEOP1 0
#define PRN10 1
#define PRN11 2
#define PEV1A 3
#define PEV1B 4
#define PSEI1 5

sfrb PIM0 = 0xa1;
#define PEOPE0 0
#define PEVE0A 3
#define PEVE0B 4
#define PSEIE0 5

sfrb PIFR0 = 0xa0;
#define PEOP0 0
#define PRN00 1
#define PRN01 2
#define PEV0A 3
#define PEV0B 4
#define PSEI0 5

sfrb OCR1BH = 0x8b;
#define OCR1BH0 0
#define OCR1BH1 1
#define OCR1BH2 2
#define OCR1BH3 3
#define OCR1BH4 4
#define OCR1BH5 5
#define OCR1BH6 6
#define OCR1BH7 7

sfrb OCR1BL = 0x8a;
#define OCR1BL0 0
#define OCR1BL1 1
#define OCR1BL2 2
#define OCR1BL3 3
#define OCR1BL4 4
#define OCR1BL5 5
#define OCR1BL6 6
#define OCR1BL7 7

sfrw OCR1BW = 0x8a;

sfrb OCR1AH = 0x89;
#define OCR1AH0 0
#define OCR1AH1 1
#define OCR1AH2 2
#define OCR1AH3 3
#define OCR1AH4 4
#define OCR1AH5 5
#define OCR1AH6 6
#define OCR1AH7 7

sfrb OCR1AL = 0x88;
#define OCR1AL0 0
#define OCR1AL1 1
#define OCR1AL2 2
#define OCR1AL3 3
#define OCR1AL4 4
#define OCR1AL5 5
#define OCR1AL6 6
#define OCR1AL7 7

sfrw OCR1AW = 0x88;

sfrb ICR1H = 0x87;
#define ICR1H0 0
#define ICR1H1 1
#define ICR1H2 2
#define ICR1H3 3
#define ICR1H4 4
#define ICR1H5 5
#define ICR1H6 6
#define ICR1H7 7

sfrb ICR1L = 0x86;
#define ICR1L0 0
#define ICR1L1 1
#define ICR1L2 2
#define ICR1L3 3
#define ICR1L4 4
#define ICR1L5 5
#define ICR1L6 6
#define ICR1L7 7

sfrw ICR1W = 0x86;

sfrb TCNT1H = 0x85;
#define TCNT1H0 0
#define TCNT1H1 1
#define TCNT1H2 2
#define TCNT1H3 3
#define TCNT1H4 4
#define TCNT1H5 5
#define TCNT1H6 6
#define TCNT1H7 7

sfrb TCNT1L = 0x84;
#define TCNT1L0 0
#define TCNT1L1 1
#define TCNT1L2 2
#define TCNT1L3 3
#define TCNT1L4 4
#define TCNT1L5 5
#define TCNT1L6 6
#define TCNT1L7 7

sfrw TCNT1W = 0x84;

sfrb TCCR1C = 0x82;
#define FOC1B 6
#define FOC1A 7

sfrb TCCR1B = 0x81;
#define CS10 0
#define CS11 1
#define CS12 2
#define WGM12 3
#define WGM13 4
#define ICES1 6
#define ICNC1 7

sfrb TCCR1A = 0x80;
#define WGM10 0
#define WGM11 1
#define COM1B0 4
#define COM1B1 5
#define COM1A0 6
#define COM1A1 7

sfrb DIDR1 = 0x7f;
#define ADC8D 0
#define ADC9D 1
#define ADC10D 2
#define AMP0ND 3
#define AMP0PD 4
#define ACMP0D 5

sfrb DIDR0 = 0x7e;
#define ADC0D 0
#define ADC1D 1
#define ADC2D 2
#define ADC3D 3
#define ADC4D 4
#define ADC5D 5
#define ADC6D 6
#define ADC7D 7

sfrb ADMUX = 0x7c;
#define MUX0 0
#define MUX1 1
#define MUX2 2
#define MUX3 3
#define ADLAR 5
#define REFS0 6
#define REFS1 7

sfrb ADCSRB = 0x7b;
#define ADTS0 0
#define ADTS1 1
#define ADTS2 2
#define ADASCR 3
#define ADAP 4

sfrb ADCSRA = 0x7a;
#define ADPS0 0
#define ADPS1 1
#define ADPS2 2
#define ADIE 3
#define ADIF 4
#define ADATE 5
#define ADSC 6
#define ADEN 7

sfrb ADCH = 0x79;
#define ADCH0 0
#define ADCH1 1
#define ADCH2 2
#define ADCH3 3
#define ADCH4 4
#define ADCH5 5
#define ADCH6 6
#define ADCH7 7

sfrb ADCL = 0x78;
#define ADCL0 0
#define ADCL1 1
#define ADCL2 2
#define ADCL3 3
#define ADCL4 4
#define ADCL5 5
#define ADCL6 6
#define ADCL7 7

sfrw ADCW = 0x78;

sfrb AMP1CSR = 0x77;

sfrb AMP0CSR = 0x76;

sfrb TIMSK1 = 0x6f;
#define TOIE1 0
#define OCIE1A 1
#define OCIE1B 2
#define ICIE1 5

sfrb TIMSK0 = 0x6e;
#define TOIE0 0
#define OCIE0A 1
#define OCIE0B 2

sfrb EICRA = 0x69;
#define ISC00 0
#define ISC01 1
#define ISC10 2
#define ISC11 3
#define ISC20 4
#define ISC21 5
#define ISC30 6
#define ISC31 7

sfrb OSCCAL = 0x66;
#define CAL0 0
#define CAL1 1
#define CAL2 2
#define CAL3 3
#define CAL4 4
#define CAL5 5
#define CAL6 6

sfrb PRR = 0x64;

sfrb CLKPR = 0x61;
#define CLKPS0 0
#define CLKPS1 1
#define CLKPS2 2
#define CLKPS3 3
#define CPKPCE 7

sfrb WDTCSR = 0x60;
#define WDP0 0
#define WDP1 1
#define WDP2 2
#define WDE 3
#define WDCE 4
#define WDP3 5
#define WDIE 6
#define WDIF 7

sfrb SREG = 0x5f;

sfrb SPH = 0x5e;
#define SP8 0
#define SP9 1
#define SP10 2
#define SP11 3
#define SP12 4
#define SP13 5
#define SP14 6
#define SP15 7

sfrb SPL = 0x5d;
#define SP0 0
#define SP1 1
#define SP2 2
#define SP3 3
#define SP4 4
#define SP5 5
#define SP6 6
#define SP7 7

sfrw SPW = 0x5d;

sfrb SPMCSR = 0x57;
#define SPMEN 0
#define PGERS 1
#define PGWRT 2
#define BLBSET 3
#define RWWSRE 4
#define RWWSB 6
#define SPMIE 7

sfrb MCUCR = 0x55;
#define IVCE 0
#define IVSEL 1
#define PUD 4
#define SPIPS 7

sfrb MCUSR = 0x54;
#define PORF 0
#define EXTRF 1
#define BORF 2
#define WDRF 3

sfrb SMCR = 0x53;
#define SE 0
#define SM0 1
#define SM1 2
#define SM2 3

sfrb ACSR = 0x50;

sfrb SPDR = 0x4e;
#define SPDR0 0
#define SPDR1 1
#define SPDR2 2
#define SPDR3 3
#define SPDR4 4
#define SPDR5 5
#define SPDR6 6
#define SPDR7 7

sfrb SPSR = 0x4d;
#define SPI2X 0
#define WCOL 6
#define SPIF 7

sfrb SPCR = 0x4c;
#define SPR0 0
#define SPR1 1
#define CPHA 2
#define CPOL 3
#define MSTR 4
#define DORD 5
#define SPE 6
#define SPIE 7

sfrb PLLCSR = 0x49;
#define PLOCK 0
#define PLLE 1
#define PCKE 2

sfrb OCR0B = 0x48;
#define OCR0_0 0
#define OCR0_1 1
#define OCR0_2 2
#define OCR0_3 3
#define OCR0_4 4
#define OCR0_5 5
#define OCR0_6 6
#define OCR0_7 7

sfrb OCR0A = 0x47;
#define OCR0_0 0
#define OCR0_1 1
#define OCR0_2 2
#define OCR0_3 3
#define OCR0_4 4
#define OCR0_5 5
#define OCR0_6 6
#define OCR0_7 7

sfrb TCNT0 = 0x46;
#define TCNT0_0 0
#define TCNT0_1 1
#define TCNT0_2 2
#define TCNT0_3 3
#define TCNT0_4 4
#define TCNT0_5 5
#define TCNT0_6 6
#define TCNT0_7 7

sfrb TCCR0B = 0x45;
#define CS00 0
#define CS01 1
#define CS02 2
#define WGM02 3
#define FOC0B 6
#define FOC0A 7

sfrb TCCR0A = 0x44;
#define WGM00 0
#define WGM01 1
#define COM0B0 4
#define COM0B1 5
#define COM0A0 6
#define COM0A1 7

sfrb GTCCR = 0x43;
#define PSR10 0
#define ICPSEL1 6
#define TSM 7

sfrb EEARH = 0x42;
#define EEAR8 0
#define EEAR9 1
#define EEAR10 2
#define EEAR11 3

sfrb EEARL = 0x41;
#define EEARL0 0
#define EEARL1 1
#define EEARL2 2
#define EEARL3 3
#define EEARL4 4
#define EEARL5 5
#define EEARL6 6
#define EEARL7 7

sfrw EEARW = 0x41;

sfrb EEDR = 0x40;
#define EEDR0 0
#define EEDR1 1
#define EEDR2 2
#define EEDR3 3
#define EEDR4 4
#define EEDR5 5
#define EEDR6 6
#define EEDR7 7

sfrb EECR = 0x3f;
#define EERE 0
#define EEWE 1
#define EEMWE 2
#define EERIE 3

sfrb GPIOR0 = 0x3e;
#define GPIOR00 0
#define GPIOR01 1
#define GPIOR02 2
#define GPIOR03 3
#define GPIOR04 4
#define GPIOR05 5
#define GPIOR06 6
#define GPIOR07 7

sfrb EIMSK = 0x3d;
#define INT0 0
#define INT1 1
#define INT2 2
#define INT3 3

sfrb EIFR = 0x3c;
#define INTF0 0
#define INTF1 1
#define INTF2 2
#define INTF3 3

sfrb GPIOR3 = 0x3b;
#define GPIOR30 0
#define GPIOR31 1
#define GPIOR32 2
#define GPIOR33 3
#define GPIOR34 4
#define GPIOR35 5
#define GPIOR36 6
#define GPIOR37 7

sfrb GPIOR2 = 0x3a;
#define GPIOR20 0
#define GPIOR21 1
#define GPIOR22 2
#define GPIOR23 3
#define GPIOR24 4
#define GPIOR25 5
#define GPIOR26 6
#define GPIOR27 7

sfrb GPIOR1 = 0x39;
#define GPIOR10 0
#define GPIOR11 1
#define GPIOR12 2
#define GPIOR13 3
#define GPIOR14 4
#define GPIOR15 5
#define GPIOR16 6
#define GPIOR17 7

sfrb TIFR1 = 0x36;
#define TOV1 0
#define OCF1A 1
#define OCF1B 2
#define ICF1 5

sfrb TIFR0 = 0x35;
#define TOV0 0
#define OCF0A 1
#define OCF0B 2

sfrb PORTE = 0x2e;
#define PORTE0 0
#define PORTE1 1
#define PORTE2 2

sfrb DDRE = 0x2d;
#define DDE0 0
#define DDE1 1
#define DDE2 2

sfrb PINE = 0x2c;
#define PINE0 0
#define PINE1 1
#define PINE2 2

sfrb PORTD = 0x2b;
#define PORTD0 0
#define PORTD1 1
#define PORTD2 2
#define PORTD3 3
#define PORTD4 4
#define PORTD5 5
#define PORTD6 6
#define PORTD7 7

sfrb DDRD = 0x2a;
#define DDD0 0
#define DDD1 1
#define DDD2 2
#define DDD3 3
#define DDD4 4
#define DDD5 5
#define DDD6 6
#define DDD7 7

sfrb PIND = 0x29;
#define PIND0 0
#define PIND1 1
#define PIND2 2
#define PIND3 3
#define PIND4 4
#define PIND5 5
#define PIND6 6
#define PIND7 7

sfrb PORTC = 0x28;
#define PORTC0 0
#define PORTC1 1
#define PORTC2 2
#define PORTC3 3
#define PORTC4 4
#define PORTC5 5
#define PORTC6 6
#define PORTC7 7

sfrb DDRC = 0x27;
#define DDC0 0
#define DDC1 1
#define DDC2 2
#define DDC3 3
#define DDC4 4
#define DDC5 5
#define DDC6 6
#define DDC7 7

sfrb PINC = 0x26;
#define PINC0 0
#define PINC1 1
#define PINC2 2
#define PINC3 3
#define PINC4 4
#define PINC5 5
#define PINC6 6
#define PINC7 7

sfrb PORTB = 0x25;
#define PORTB0 0
#define PORTB1 1
#define PORTB2 2
#define PORTB3 3
#define PORTB4 4
#define PORTB5 5
#define PORTB6 6
#define PORTB7 7

sfrb DDRB = 0x24;
#define DDB0 0
#define DDB1 1
#define DDB2 2
#define DDB3 3
#define DDB4 4
#define DDB5 5
#define DDB6 6
#define DDB7 7

sfrb PINB = 0x23;
#define PINB0 0
#define PINB1 1
#define PINB2 2
#define PINB3 3
#define PINB4 4
#define PINB5 5
#define PINB6 6
#define PINB7 7

#endif