// AX07CF192 register and bit definitions.
//
// Copyright (c) 2005 Rowley Associates Limited.
//
// This file may be distributed under the terms of the License Agreement
// provided with this software.
//
// THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE
// WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.

#ifndef AX07CF192_h
#define AX07CF192_h

#define MCU_BASE 0x9000000

#define PAMR (*(volatile unsigned long *)0x9000000)
#define PAMR_OFFSET 0x0

#define PBMR (*(volatile unsigned long *)0x9000004)
#define PBMR_OFFSET 0x4

#define P1MR (*(volatile unsigned long *)0x9000008)
#define P1MR_OFFSET 0x8

#define P2MR (*(volatile unsigned long *)0x900000C)
#define P2MR_OFFSET 0xC

#define P3MR (*(volatile unsigned long *)0x9000010)
#define P3MR_OFFSET 0x10

#define P4MR (*(volatile unsigned long *)0x9000014)
#define P4MR_OFFSET 0x14

#define P5MR (*(volatile unsigned long *)0x9000018)
#define P5MR_OFFSET 0x18

#define P6MR (*(volatile unsigned long *)0x900001C)
#define P6MR_OFFSET 0x1C

#define P7MR (*(volatile unsigned long *)0x9000020)
#define P7MR_OFFSET 0x20

#define P8MR (*(volatile unsigned long *)0x9000024)
#define P8MR_OFFSET 0x24

#define P9MR (*(volatile unsigned long *)0x9000028)
#define P9MR_OFFSET 0x28

#define DCR (*(volatile unsigned long *)0x900002C)
#define DCR_OFFSET 0x2C

#define SMI_BASE 0x9000100

#define BCR0 (*(volatile unsigned long *)0x9000100)
#define BCR0_OFFSET 0x0

#define BCR1 (*(volatile unsigned long *)0x9000104)
#define BCR1_OFFSET 0x4

#define BCR2 (*(volatile unsigned long *)0x9000108)
#define BCR2_OFFSET 0x8

#define BCR3 (*(volatile unsigned long *)0x900010C)
#define BCR3_OFFSET 0xC

#define BCR4 (*(volatile unsigned long *)0x9000110)
#define BCR4_OFFSET 0x10

#define BCR5 (*(volatile unsigned long *)0x9000114)
#define BCR5_OFFSET 0x14

#define BCR6 (*(volatile unsigned long *)0x9000118)
#define BCR6_OFFSET 0x18

#define BCR7 (*(volatile unsigned long *)0x900011C)
#define BCR7_OFFSET 0x1C

#define FMI_BASE 0x9000200

#define FMWR (*(volatile unsigned long *)0x9000200)
#define FMWR_OFFSET 0x0

#define FMAR (*(volatile unsigned long *)0x9000204)
#define FMAR_OFFSET 0x4

#define FMDR (*(volatile unsigned long *)0x9000208)
#define FMDR_OFFSET 0x8

#define FMCR (*(volatile unsigned long *)0x900020C)
#define FMCR_OFFSET 0xC

#define FESR (*(volatile unsigned long *)0x9000210)
#define FESR_OFFSET 0x10

#define FMPR (*(volatile unsigned long *)0x9000214)
#define FMPR_OFFSET 0x14

#define FMTR (*(volatile unsigned long *)0x9000218)
#define FMTR_OFFSET 0x18

#define PMU_BASE 0x9001000

#define PMUST (*(volatile unsigned long *)0x9001000)
#define PMUST_OFFSET 0x0

#define PMUCR (*(volatile unsigned long *)0x9001000)
#define PMUCR_OFFSET 0x0

#define PCLKCR (*(volatile unsigned long *)0x9001008)
#define PCLKCR_OFFSET 0x8

#define MEMSR (*(volatile unsigned long *)0x900100C)
#define MEMSR_OFFSET 0xC

#define MEMCR (*(volatile unsigned long *)0x9001010)
#define MEMCR_OFFSET 0x10

#define RSTCR (*(volatile unsigned long *)0x9001030)
#define RSTCR_OFFSET 0x30

#define WDT_BASE 0x9001100

#define WTCR (*(volatile unsigned long *)0x9001100)
#define WTCR_OFFSET 0x0

#define WTSR (*(volatile unsigned long *)0x9001104)
#define WTSR_OFFSET 0x4

#define WTCNT (*(volatile unsigned long *)0x9001108)
#define WTCNT_OFFSET 0x8

#define INTC_BASE 0x9001200

#define GMR (*(volatile unsigned long *)0x9001200)
#define GMR_OFFSET 0x0

#define TMR (*(volatile unsigned long *)0x9001204)
#define TMR_OFFSET 0x4

#define TPR (*(volatile unsigned long *)0x9001208)
#define TPR_OFFSET 0x8

#define IDR (*(volatile unsigned long *)0x900120C)
#define IDR_OFFSET 0xC

#define FSR (*(volatile unsigned long *)0x9001210)
#define FSR_OFFSET 0x10

#define ISR (*(volatile unsigned long *)0x9001214)
#define ISR_OFFSET 0x14

#define FMR (*(volatile unsigned long *)0x9001218)
#define FMR_OFFSET 0x18

#define IMR (*(volatile unsigned long *)0x900121C)
#define IMR_OFFSET 0x1C

#define ISCR (*(volatile unsigned long *)0x9001220)
#define ISCR_OFFSET 0x20

#define TIMER_BASE 0x9001300

#define TSTARTR (*(volatile unsigned long *)0x9001300)
#define TSTARTR_OFFSET 0x0

#define TSYNCR (*(volatile unsigned long *)0x9001304)
#define TSYNCR_OFFSET 0x4

#define TPWMR (*(volatile unsigned long *)0x9001308)
#define TPWMR_OFFSET 0x8

#define TSTINR (*(volatile unsigned long *)0x900130C)
#define TSTINR_OFFSET 0xC

#define TSTOUTR (*(volatile unsigned long *)0x9001310)
#define TSTOUTR_OFFSET 0x10

#define TSTMODER (*(volatile unsigned long *)0x9001314)
#define TSTMODER_OFFSET 0x14

#define TSTINTR (*(volatile unsigned long *)0x9001318)
#define TSTINTR_OFFSET 0x18

#define TCR0 (*(volatile unsigned long *)0x9001320)
#define TCR0_OFFSET 0x20

#define TIOCR0 (*(volatile unsigned long *)0x9001324)
#define TIOCR0_OFFSET 0x24

#define TIER0 (*(volatile unsigned long *)0x9001328)
#define TIER0_OFFSET 0x28

#define TSR0 (*(volatile unsigned long *)0x900132C)
#define TSR0_OFFSET 0x2C

#define TCNT0 (*(volatile unsigned long *)0x9001330)
#define TCNT0_OFFSET 0x30

#define GRA0 (*(volatile unsigned long *)0x9001334)
#define GRA0_OFFSET 0x34

#define GRB0 (*(volatile unsigned long *)0x9001338)
#define GRB0_OFFSET 0x38

#define TCR1 (*(volatile unsigned long *)0x9001340)
#define TCR1_OFFSET 0x40

#define TIOCR1 (*(volatile unsigned long *)0x9001344)
#define TIOCR1_OFFSET 0x44

#define TIER1 (*(volatile unsigned long *)0x9001348)
#define TIER1_OFFSET 0x48

#define TSR1 (*(volatile unsigned long *)0x900134C)
#define TSR1_OFFSET 0x4C

#define TCNT1 (*(volatile unsigned long *)0x9001350)
#define TCNT1_OFFSET 0x50

#define GRA1 (*(volatile unsigned long *)0x9001354)
#define GRA1_OFFSET 0x54

#define GRB1 (*(volatile unsigned long *)0x9001358)
#define GRB1_OFFSET 0x58

#define TCR2 (*(volatile unsigned long *)0x9001360)
#define TCR2_OFFSET 0x60

#define TIOCR2 (*(volatile unsigned long *)0x9001364)
#define TIOCR2_OFFSET 0x64

#define TIER2 (*(volatile unsigned long *)0x9001368)
#define TIER2_OFFSET 0x68

#define TSR2 (*(volatile unsigned long *)0x900136C)
#define TSR2_OFFSET 0x6C

#define TCNT2 (*(volatile unsigned long *)0x9001370)
#define TCNT2_OFFSET 0x70

#define GRA2 (*(volatile unsigned long *)0x9001374)
#define GRA2_OFFSET 0x74

#define GRB2 (*(volatile unsigned long *)0x9001378)
#define GRB2_OFFSET 0x78

#define TCR3 (*(volatile unsigned long *)0x9001380)
#define TCR3_OFFSET 0x80

#define TIOCR3 (*(volatile unsigned long *)0x9001384)
#define TIOCR3_OFFSET 0x84

#define TIER3 (*(volatile unsigned long *)0x9001388)
#define TIER3_OFFSET 0x88

#define TSR3 (*(volatile unsigned long *)0x900138C)
#define TSR3_OFFSET 0x8C

#define TCNT3 (*(volatile unsigned long *)0x9001390)
#define TCNT3_OFFSET 0x90

#define GRA3 (*(volatile unsigned long *)0x9001394)
#define GRA3_OFFSET 0x94

#define GRB3 (*(volatile unsigned long *)0x9001398)
#define GRB3_OFFSET 0x98

#define TCR4 (*(volatile unsigned long *)0x90013A0)
#define TCR4_OFFSET 0xA0

#define TIOCR4 (*(volatile unsigned long *)0x90013A4)
#define TIOCR4_OFFSET 0xA4

#define TIER4 (*(volatile unsigned long *)0x90013A8)
#define TIER4_OFFSET 0xA8

#define TSR4 (*(volatile unsigned long *)0x90013AC)
#define TSR4_OFFSET 0xAC

#define TCNT4 (*(volatile unsigned long *)0x90013B0)
#define TCNT4_OFFSET 0xB0

#define GRA4 (*(volatile unsigned long *)0x90013B4)
#define GRA4_OFFSET 0xB4

#define GRB4 (*(volatile unsigned long *)0x90013B8)
#define GRB4_OFFSET 0xB8

#define TCR5 (*(volatile unsigned long *)0x90013D0)
#define TCR5_OFFSET 0xD0

#define TIOCR5 (*(volatile unsigned long *)0x90013D4)
#define TIOCR5_OFFSET 0xD4

#define TIER5 (*(volatile unsigned long *)0x90013D8)
#define TIER5_OFFSET 0xD8

#define TSR5 (*(volatile unsigned long *)0x90013DC)
#define TSR5_OFFSET 0xDC

#define TCNT5 (*(volatile unsigned long *)0x90013E0)
#define TCNT5_OFFSET 0xE0

#define GRA5 (*(volatile unsigned long *)0x90013E4)
#define GRA5_OFFSET 0xE4

#define GRB5 (*(volatile unsigned long *)0x90013E8)
#define GRB5_OFFSET 0xE8

#define UART_BASE 0x9001400

#define U0RBR (*(volatile unsigned long *)0x9001400)
#define U0RBR_OFFSET 0x0

#define U0THR (*(volatile unsigned long *)0x9001400)
#define U0THR_OFFSET 0x0

#define U0DLL (*(volatile unsigned long *)0x9001400)
#define U0DLL_OFFSET 0x0

#define U0IER (*(volatile unsigned long *)0x9001404)
#define U0IER_OFFSET 0x4

#define U0DLM (*(volatile unsigned long *)0x9001404)
#define U0DLM_OFFSET 0x4

#define U0IIR (*(volatile unsigned long *)0x9001408)
#define U0IIR_OFFSET 0x8

#define U0FCR (*(volatile unsigned long *)0x9001408)
#define U0FCR_OFFSET 0x8

#define U0LCR (*(volatile unsigned long *)0x900140C)
#define U0LCR_OFFSET 0xC

#define U0LSR (*(volatile unsigned long *)0x9001414)
#define U0LSR_OFFSET 0x14

#define U0SCR (*(volatile unsigned long *)0x900141C)
#define U0SCR_OFFSET 0x1C

#define UCLKCR (*(volatile unsigned long *)0x9001420)
#define UCLKCR_OFFSET 0x20

#define UCLKDR (*(volatile unsigned long *)0x9001424)
#define UCLKDR_OFFSET 0x24

#define U1RBR (*(volatile unsigned long *)0x9001500)
#define U1RBR_OFFSET 0x100

#define U1THR (*(volatile unsigned long *)0x9001500)
#define U1THR_OFFSET 0x100

#define U1DLL (*(volatile unsigned long *)0x9001500)
#define U1DLL_OFFSET 0x100

#define U1IER (*(volatile unsigned long *)0x9001504)
#define U1IER_OFFSET 0x104

#define U1DLM (*(volatile unsigned long *)0x9001504)
#define U1DLM_OFFSET 0x104

#define U1IIR (*(volatile unsigned long *)0x9001508)
#define U1IIR_OFFSET 0x108

#define U1FCR (*(volatile unsigned long *)0x9001508)
#define U1FCR_OFFSET 0x108

#define U1LCR (*(volatile unsigned long *)0x900150C)
#define U1LCR_OFFSET 0x10C

#define U1LSR (*(volatile unsigned long *)0x9001514)
#define U1LSR_OFFSET 0x114

#define U1SCR (*(volatile unsigned long *)0x900151C)
#define U1SCR_OFFSET 0x11C

#define PIO_BASE 0x9001600

#define PADR (*(volatile unsigned long *)0x9001600)
#define PADR_OFFSET 0x0

#define PADDR (*(volatile unsigned long *)0x9001604)
#define PADDR_OFFSET 0x4

#define PBDR (*(volatile unsigned long *)0x9001608)
#define PBDR_OFFSET 0x8

#define PBDDR (*(volatile unsigned long *)0x900160C)
#define PBDDR_OFFSET 0xC

#define P1DR (*(volatile unsigned long *)0x9001610)
#define P1DR_OFFSET 0x10

#define P1DDR (*(volatile unsigned long *)0x9001614)
#define P1DDR_OFFSET 0x14

#define P2DR (*(volatile unsigned long *)0x9001618)
#define P2DR_OFFSET 0x18

#define P2DDR (*(volatile unsigned long *)0x900161C)
#define P2DDR_OFFSET 0x1C

#define P3DR (*(volatile unsigned long *)0x9001620)
#define P3DR_OFFSET 0x20

#define P3DDR (*(volatile unsigned long *)0x9001624)
#define P3DDR_OFFSET 0x24

#define P4DR (*(volatile unsigned long *)0x9001628)
#define P4DR_OFFSET 0x28

#define P4DDR (*(volatile unsigned long *)0x900162C)
#define P4DDR_OFFSET 0x2C

#define P5DR (*(volatile unsigned long *)0x9001630)
#define P5DR_OFFSET 0x30

#define P5DDR (*(volatile unsigned long *)0x9001634)
#define P5DDR_OFFSET 0x34

#define P6DR (*(volatile unsigned long *)0x9001638)
#define P6DR_OFFSET 0x38

#define P6DDR (*(volatile unsigned long *)0x900163C)
#define P6DDR_OFFSET 0x3C

#define P7DR (*(volatile unsigned long *)0x9001640)
#define P7DR_OFFSET 0x40

#define P7DDR (*(volatile unsigned long *)0x9001644)
#define P7DDR_OFFSET 0x44

#define P8DR (*(volatile unsigned long *)0x9001648)
#define P8DR_OFFSET 0x48

#define P8DDR (*(volatile unsigned long *)0x900164C)
#define P8DDR_OFFSET 0x4C

#define P9DR (*(volatile unsigned long *)0x9001650)
#define P9DR_OFFSET 0x50

#define P9DDR (*(volatile unsigned long *)0x9001654)
#define P9DDR_OFFSET 0x54

#define ADC_BASE 0x9001700

#define ADSR (*(volatile unsigned long *)0x9001700)
#define ADSR_OFFSET 0x0

#define ADCR (*(volatile unsigned long *)0x9001704)
#define ADCR_OFFSET 0x4

#define ADDR0 (*(volatile unsigned long *)0x9001708)
#define ADDR0_OFFSET 0x8

#define ADDR1 (*(volatile unsigned long *)0x900170C)
#define ADDR1_OFFSET 0xC

#define ADDR2 (*(volatile unsigned long *)0x9001710)
#define ADDR2_OFFSET 0x10

#define ADDR3 (*(volatile unsigned long *)0x9001714)
#define ADDR3_OFFSET 0x14

#define ADDR4 (*(volatile unsigned long *)0x9001718)
#define ADDR4_OFFSET 0x18


#endif
