CrossStudio's New Project Wizard simplifies the creation of projects for the Freescale MC9328MXL by creating a project with the appropriate project settings, memory map files and startup files. See Creating a New Project for more information on creating projects.
CrossStudio for ARM supports the Freescale MC9328MXL running applications that have been loaded into FLASH. You can choose to run the .text section (the bulk of the application code) in either the FLASH or the RAM by selecting either a FLASH or RAM configuration when building your application.
Warning: Downloading to FLASH will erase the and re-program the FLASH memory thus removing its contents.
CrossStudio for ARM also supports the Freescale MC9328MXL running in little and big endian modes. You can choose little or big endian modes by selecting either a LE or BE configuration when building your application. Note that you will also need to configure your target hardware to run using the same endian mode as your software.
The following sections describe the Freescale MC9328MXL support in more detail. See ARM Target Support for more information.
The default memory map file $(StudioDir)/targets/Freescale_MC9328MXL/MC9328MXL_MemoryMap.xml has been provided. This file is used to describe the memory layout of the target and is used for linking and debugging. The placement of program sections within the memory map for both RAM and FLASH configurations is described by the non-target-specific default memory maps $(StudioDir)/targets/flash_placement.xml and $(StudioDir)/targets/flash_run_text_from_ram_placement.xml.
The memory segment layout for both configurations is the same and is described in the following table:
Type | Description | Start Address | End Address |
RAM | External SDRAM | 0x08000000 | 0x0BFFFFFF |
FLASH | External FLASH | 0x0C000000 | 0x0CFFFFFF |
The default startup code is in $(StudioDir)/targets/Freescale_MC9328MXL/MC9328MXL_Startup.s. It contains the exception vectors and the default exception handlers and is also responsible for configuring the target.
The default configuration enables the MMU in order enable the instruction and data caches. The MMU is configured to use a simple flat memory translation where virtual addresses equal physical addresses. The following table describes the default RAM memory with the MMU and caches enabled:
Description | Start Address | End Address |
Cacheable RAM | 0x08000000 | 0x0BEFFFFF |
Non-cacheable RAM | 0x0BF00000 | 0x0BFFAFFF |
System RAM | 0x0BFFB000 | 0x0BFFFFFF |
The Cacheable RAM and Non-cacheable RAM address ranges are available to applications. The System RAM address range is reserved for supporting the MMU and is structured as follows:
Description | Start Address | End Address |
MMU Debugger Code | 0x0BFFB000 | 0x0BFFBFFF |
MMU Translation Table | 0x0BFFC000 | 0x0BFFFFFF |