Node: Xtensa, Previous: WIN32, Up: Machine Dependent

### `ld` and Xtensa Processors

The default `ld` behavior for Xtensa processors is to interpret `SECTIONS` commands so that lists of explicitly named sections in a specification with a wildcard file will be interleaved when necessary to keep literal pools within the range of PC-relative load offsets. For example, with the command:

         SECTIONS
         {
           .text : {
             *(.literal .text)
           }
         }

`ld` may interleave some of the `.literal` and `.text` sections from different object files to ensure that the literal pools are within the range of PC-relative load offsets. A valid interleaving might place the `.literal` sections from an initial group of files followed by the `.text` sections of that group of files. Then, the `.literal` sections from the rest of the files and the `.text` sections from the rest of the files would follow. The non-interleaved order can still be specified as:

         SECTIONS
         {
           .text : {
             *(.literal) *(.text)
           }
         }

The Xtensa version of `ld` enables the `--relax` option by default to attempt to reduce space in the output image by combining literals with identical values. It also provides the `--no-relax` option to disable this optimization. When enabled, the relaxation algorithm ensures that a literal will only be merged with another literal when the new merged literal location is within the offset range of all of its uses.

The relaxation mechanism will also attempt to optimize assembler-generated "longcall" sequences of `L32R`/`CALLX` n when the target is known to fit into a `CALL` n instruction encoding. The current optimization converts the sequence into `NOP`/`CALL` n and removes the literal referenced by the `L32R` instruction.