Texas Instruments Sitara CPU Support Package

This package contains project templates and system files for the Texas Instruments Sitara.

CrossWorks Version 3 Installation Instructions

This package can only be installed if you have the following CrossWorks license bolt-ons:

• ARM License

To install this support package

1. Click the Tools > Package Manager menu option to open the package manager window.
2. Right click on the Texas Instruments Sitara CPU Support Package entry and select Install Selected Packages.
3. Click Next to take you to the summary page.
4. Click Next to install the package.
5. Click Finish to close the package manager window.
6. Click the Tools > Show Installed Packages.
7. Click on the Texas Instruments Sitara CPU Support Package link to view the package and its contents.

To manually install this support package

1. If you have not done so already, follow the CrossWorks Tasking Library Package installation instructions.
2. Download the file Sitara_V3.hzq using your web browser.
3. Click the Tools > Manually Install Packages menu option.
4. Select the file you have just downloaded to install the package.
5. Click the Tools > Show Installed Packages.
6. Click on the Texas Instruments Sitara CPU Support Package link to view the package and its contents.

To install this support package using other versions

• CrossWorks Version 4 Installation Instructions

Release Notes

3.0

• Initial release for CrossWorks V3.

Documentation

1) Creating Projects

To create a new Sitara project

• Select the File > New > New Project menu item.
• Select the appropriate Generic Sitara from the Categories list.
• Select the required project template type from the Templates list.
• Set the required project name and location directory.
• Click OK.

To build and debug an application

• Select the project to work on by using the Project > Set Active Project menu option.
• Select the configuration you require by using the Build > Set Active Build Configuration menu option.
• Right click on the project node in project explorer and select the required Target Processor.
• Build the project by using the Build > Build Project menu option.
• Connect to the appropriate target in the target window.
• Download and start debugging the current project by using Debug > Start Debugging.

The project will be built to run in the internal SRAM of the target.

2) Project Specifics

Target and Placement property groups

The propertyGroups.xml file implements the Target and Placement property groups. These can be set in the project explorer - right click on the project node of a Sitara project.

The Target property group selects the target specific build and debug properties and also defines one of the following C preprocessor defines:

• TARGET_AM335x
• TARGET_AM35x
• TARGET_AM37x
• TARGET_OMAP35x

The Placement property group selects the linker placement from one of the following:

• SDRAM - program is loaded and runs in SDRAM.
• OCM RAM - program is loaded and runs in internal SRAM.

Header Files

The following header files are generated from the memory map files:

• AM335x.h
• AM35x.h
• AM37x.h
• OMAP35x.h

The header files use the register names as defined in the appropriate reference manuals:

• AM335x TRM
• AM35x TRM
• AM37x TRM
• OMAP35x TRM

Note that when a register group is replicated then the register group name is prepended to the register name for example GPIO1_CTRL and GPIO2_CTRL.

Memory Map Files

The following Memory map files are provided that describe the memory and registers of the various devices.

• AM335x_MemoryMap.xml
• AM35x_MemoryMap.xml
• AM37x_MemoryMap.xml
• OMAP35x_MemoryMap.xml

The names and sizes of the GPMC and SDRAM memory segments can be specified using the linker memory map macros property, for example EMIF0_SDRAM_NAME=SDRAM;EMIF0_SDRAM_SIZE=0x800000 will name and size the SDRAM section.

Memory Simulator

A memory simulator is provided that implements the internal SRAM and the SDRAM of the various devices. No peripherals are simulated.

Startup code

The file Sitara_Startup.s implements the exception vectors. It is assumed that prior to this code being called the CPU clock and memories have been initialised.

The reset exception will (optionally) disable the WDT2, set up the exception vectors base address, turns on the MMU/caches and the VFP before calling the C startup code.

The irq exception vector will change stacks and then re-enable interrupts (to enable nested interrupts) prior to calling the function pointer in the appropriate vector position of the C table called fnRAMVectors.

The file Sitart_ctl.c is provided that implements the ctl irq set functions.

Target scripts

Target scripts are provided to enable the Sitara devices to be debugged. Note that the Sitara devices cannot be reset under debug control so the starting debug state will be affected by the various boot sources.