NXP LPC3100 CPU Support Package

This package contains project templates and system files for the NXP LPC3100.

CrossWorks Version 3 Installation Instructions

This package can only be installed if you have the following CrossWorks license bolt-ons:

• ARM License

To install this support package

1. Click the Tools > Package Manager menu option to open the package manager window.
2. Right click on the NXP LPC3100 CPU Support Package entry and select Install Selected Packages.
3. Click Next to take you to the summary page.
4. Click Next to install the package.
5. Click Finish to close the package manager window.
6. Click the Tools > Show Installed Packages.
7. Click on the NXP LPC3100 CPU Support Package link to view the package and its contents.

To manually install this support package

1. If you have not done so already, follow the CrossWorks Tasking Library Package installation instructions.
2. Download the file LPC3100.hzq using your web browser.
3. Click the Tools > Manually Install Packages menu option.
4. Select the file you have just downloaded to install the package.
5. Click the Tools > Show Installed Packages.
6. Click on the NXP LPC3100 CPU Support Package link to view the package and its contents.

To install this support package using other versions

• CrossWorks Version 2 Installation Instructions
• CrossWorks Version 4 Installation Instructions

Release Notes

2.2

• Placement files now use the runoffset attribute which requires Crossworks for ARM version 2.3.1.
• Fixed SPI-NOR Flash Loader verify source code.

2.1

• Uses the ISROM Built-in MMU table when a CACHED placement option is selected.
• Samples are included.
• Seperated loader memory map and startup file from secondary loader memory map and startup file.
• Updated memory map/header files to reflect latest documentation.

2.0

• Initial Release.

Documentation

Creating LPC3100 Projects

To create a new LPC3100 project

• Select the File > New > New Project menu item.
• Select Generic LPC31xx from the Project Type list.
• Select the required project template type from the Templates list.
• Set the required project name and location directory.
• Click OK.

This will create a project that will run in the internal RAM (ISRAM) of an LPC3100 board.

To build and debug an application

• Select the project to work on by using the Project > Set Active Project menu option.
• Select the configuration you require by using the Build > Set Active Build Configuration menu option.
• Build the project by using the Build > Build Project menu option.
• Connect to the appropriate target in the target window.
• Download and start debugging the current project by using Debug > Start Debugging.

To make the application run faster

• Right click on the project node in the project explorer and select the ISRAM CACHED placement.
• Rebuild the application and it will run with MMU/Caches enabled.

To load and debug an application into the SPI-NOR flash.

• Connect to the appropriate target in the target window.
• Right click on the project node in the project explorer and select Program SPI-NOR flash.
• Start debugging by using Debug | Reset and Debug.

To make the application startup from reset.

• Set the project property Startup From Reset in the Build Options to Yes.

LPC3100 Project Specifics

Target Processor

Once a project has been created you can select different target processors from the selected set by right clicking on the project node in the project explorer and selecting the Target Processor entry.

Selecting the target processor will specify the memory map that is used for the build and debug. You can view the selected memory map by right clicking on the project node in the project explorer and selecting View Memory Map or View Memory Map (as text). In the memory map files the memory segments defining the names, sizes and access types of the external memories are specified using macros which can be set using the Memory Map Macros project property.

Section Placement

CrossStudio for ARM supports LPC3100 projects running applications in a number of different memory configurations. You can select the memory configuration you require by right clicking on the project node in the project explorer and selecting the Placement entry.

For LPC3100 projects the set of placements are:

• ISRAM application runs in internal SRAM.
• ISRAM CACHED application runs in internal SRAM with MMU enabled.
• SDRAM application runs in SDRAM.
• SDRAM CACHED application runs in SDRAM with MMU enabled.

Debug Handler

When you create a LPC3100 project the file ARMDIDebugHandler.s is included in the project. This file is used to:

• implement monitor mode debug. This enables interrupts to occur when stopped on a breakpoint and memory to be examined without stopping the processor.
• invalidate the icache/clean dcache on writes to cacheable memory to enable software breakpoints to be set. You may need to use the debug handler if the JTAG cable you are using doesn't support icache invalidating/dcache cleaning.

The project setup code creates a debug project property Debug Handler that enables you to choose additional (to JTAG) debug capabilities you require:

• None don't use the debug handler for breakpoints.
• Halt Mode use the debug handler but don't allow interrupts to execute on breakpoint.
• Monitor Mode Memory same as halt mode but memory access is done using the debug handler. To use this your application will have to periodically call the function dbg_poll()
• Monitor Mode full monitor mode debug.

Target Startup Code

The startup code LPC3100_Startup.s is common to all LPC3100 processors there are a set of preprocessor defines that configure the startup code and are documented in the startup file itself.

Target Reset Script

The reset script LPC3100_Target.js is used by the debugger to stop the processor, turn off the MMU and caches and then sets the PLL based on a 12Mhz oscillator.

LPC3100 SPI-NOR Flash Loader

The loaders (click to load solution) solution has projects to build the flash loader and secondary boot loader for the SPI-NOR flash. The SPI flash loader works by shadowing code memory writes to the ISRAM into the SPI flash. It adds the secondary boot loader into the first 16K bytes of the SPI flash. Note that the loader only supports the Atmel AT45DB321 with the 512 page size fuse set other SPI-NOR flash parts will require modification and rebuild of the source code of the flash loaders.

• spi_flash.c the SPI flash functions .
• spi_flash_loader.c the SPI flash loader.
• Loader_MemoryMap.xml the loader memory map and placement.
• Loader_Startup.s reduced startup code for the loader.
• spi_flash_sb_loader.c the secondary boot loader.
• spi_flash_sb_loader_binary.s the binary image of the secondary boot loader.
• Secondary_Loader_MemoryMap.xml the secondary boot loader memory map and placement.
• Secondary_Loader_Startup.s reduced startup code for the secondary boot loader.

Memory Simulator

An LPC3100 memory simulator is provided that simulates the memories of the various LPC3100 devices. The memory simulation parameter (which is set by the Target Processor selection) contains macros that determine the sizes of the simulated memories and can be specified using the Memory Simulation Parameter Macros property.

Interrupt Handling

The file LPC3100.c implements the ctl_set_isr, ctl_unmask_isr and ctl_mask_isr functions by programming the INTC register group. The number parameter to these functions corresponds to the interrupt source number as documented in the LPC313x user manual. If the priority parameter to the function ctl_set_isr is a number between 1 and 15 then an ARM IRQ exception is generated. If nested interrupts are enabled on the irq_handler then the priority is a pre-emption priority i.e. interrupt handlers can be interrupted by higher priority interrupt handlers. If the priority parameter to the function ctl_set_isr is 16 then an ARM FIQ exception is generated.

The file LPC3100_irq_handler.s implements the irq_handler and fiq_handler exception handlers.

CTL Timer Support

The file LPC3100.c implements the ctl_start_timer function using the TIMER0 register group assuming a 12Mhz clock input.

Header Files

Header files are generated from the memory map files and can be included using the file LPC3100.h. The LPC3100 project setup adds the directory $(TargetsDir)/LPC3100 to the User Include Directories project property so that you can just include targets/LPC3100.h into your source code.

CrossWorks Sample Projects

The following project files are supplied that can be used to run the standard CrossWorks samples.

• LPC3131 Shared Samples (click to load project)
• LPC3131 CTL Samples (click to load project)
• LPC3141 Shared Samples (click to load project)
• LPC3141 CTL Samples (click to load project)
• LPC3152 Shared Samples (click to load project)
• LPC3152 CTL Samples (click to load project)