Freescale Kinetis CPU Support Package

Warning: This is a legacy package, it has been provided to keep existing projects working and is not recommended for new projects. This package has been replaced by NXP Kinetis CPU Support Package.

This package contains project templates and system files for the Freescale Kinetis.

CrossWorks Version 2 Installation Instructions

To install this support package

1. Click the Tools > Package Manager menu option to open the package manager window.
2. Right click on the Freescale Kinetis CPU Support Package entry and select Install Selected Packages.
3. Click Next to take you to the summary page.
4. Click Next to install the package.
5. Click Finish to close the package manager window.
6. Click the Tools > Show Installed Packages.
7. Click on the Freescale Kinetis CPU Support Package link to view the package and its contents.

To manually install this support package

1. If you have not done so already, follow the CMSIS 3 Support Package installation instructions.
2. Download the file Kinetis.hzq using your web browser.
3. Click the Tools > Manually Install Packages menu option.
4. Select the file you have just downloaded to install the package.
5. Click the Tools > Show Installed Packages.
6. Click on the Freescale Kinetis CPU Support Package link to view the package and its contents.

To install this support package using other versions

• CrossWorks Version 3 Installation Instructions
• CrossWorks Version 4 Installation Instructions

Release Notes

1.17

• Fixed K series loader problem introduced in version 1.16.
• Supplied updated CMSIS files for KE02 and KE04.

1.16

• Added support for KE04, KE06, KV3x and KW0x devices.

1.15

• Support for KW2x devices.

1.14

• Support for KV1x devices.

1.13

• Renamed MK*Vxx/MK*Cxx devices to MK*xxx. You will need to reselect the Target processor property for existing projects.
• K-series loader solution now runs 8K of SRAM.
• Added support for MKL16Z4, MKL26Z4 and MLK34Z4 devices.
• Added support for MK20F12, MK21F12, MK22F12, MK24F12, MK63F12 and MK64F12 devices.
• Added ctl_lowest_isr_priority/ctl_highest_isr_priority/ctl_adjust_isr_priority to Kinetis_ctl.c.
• Supplied latest CMSIS devices files from Freescale.

1.12

• Added support for MKM14Z5, MKM33Z5 and MKM34Z5 devices.
• Fixed erase all for L series flash loader.

1.11

• K series flash loaders support DataFlash loading and now uses a loader parameter to specify the sector sizes of the program and data flashes. You will need to reselect the Target processor to update your project with the correct loader parameter.

1.10

• Added support for MKE02Z2, MKE04Z4, MKL24Z4, MKL34Z4 and MKL46Z4 devices.
• A memory map file per device is now supplied. For existing projects you will need to reselect the Target property to reference the new memory map file.
• Supplied latest CMSIS devices files from Freescale.
• Supplied L series flash loader that works in 1K of SRAM.
• Fixed flash breakpoint support in L series flash loaders.
• Added ctl_sleep and ctl_woken to Kinetis_ctl.c. These functions can be used in CTL V3 to reduce the timer interrupt frequency when in low power mode.
• Added test10.c to ctl tests. This file is supplied with CTL V3.

1.9

• Added support for MK11D5, MK12D5, MK21D5, MK22D5 and MKL02Z4 devices.
• Modified L series flash loader to run in 2K of SRAM - note 1K SRAM parts are not supported.

1.8

• Fixed VECTORS_IN_RAM initialization.

1.7

• Modified L series flash loader to run in 4K of SRAM - note that 2K and 1K parts are not supported.
• Samples removed - these are in their own board support packages.
• New CTL projects now allocate a process stack. If you have an existing CTL project then you should do similar since this is required for the CTL supplied with CrossWorks for ARM version 2.3.1.

1.6

• Fixed startup code when VECTORS_IN_RAM defined.
• Added preprocessor define __FPU_PRESENT=1 to MKxxF Target property group entries.
• Changed startup code to fill to 0x400 rather than align to 0x400 to save Flash space.
• Added memory map support for DDR.
• Added TWR-K70F120M Dhrystone sample that executes in DDR.

1.5

• Added support for L series devices. CrossWorks for ARM version 2.3 is required for Cortex-M0+ support.
• Supplied samples for FRDM-KL25Z.
• Supplied samples for TWR-K20D72M.
• Fixed Erase All to set the flash security state to be unsecure.
• The GetPartName script now handles connecting to parts that are secured (but can be mass erased) and also to parts that have been erased. CrossWorks for ARM version 2.3 is required to make use of these facilities.
• Removed disabling the hardware lazy FP save feature for CTL. CTL supplied in CrossWorks for ARM version 2.3 supports the hardware lazy FP save feature.
• Removed core CMSIS header files from this package. New projects will reference the include directory $(TargetsDir)/CMSIS_3/CMSIS/Include of the CMSIS-3 package. If you have an existing project then you will have to add $(TargetsDir)/CMSIS_3/CMSIS/Include to the User Include Directories project property.

1.4

• Support for latest parts based on the sub-family name and memory size rather than specific part numbers. For example MK60DN512ZVMD10 has become MK60DN512Zxxx10. You will need to reselect the Target Processer property for existing projects.
• Updated the flash loader to handle 50Mhz and 120Mhz devices.
• Modified the startup code to have part specific vector tables.
• Modified the startup code to enable the FPU for devices that have one.
• Supplied samples for TWR-K20D50M, TWR-K60F120M and TWR-K70F120M.

1.3

• Supplied samples for TWR-K53N512.
• Supplied firmware update for OSJTAG.
• Kinetis projects now have the 'GCC Target' property set to be 'arm-unknown-eabi'.
• Fixed reset script to stop the target prior to accessing MDM registers for 'P&E' target interface.

1.2

• Support for latest parts and new part numbering e.g MK60N512VMD100 has become MK60DN512ZVMD10. You will need to reselect the Target Processor property for existing projects.
• Added GetPartName and MatchPartName functions to the target script. New projects will set the Get Part Name Script and Match Part Name Script project properties to enable part name detection on connect and compatibility on start debugging (requires CrossWorks for ARM Version 2.1.2 and above).
• Removed Kinetis_SystemInit.c you'll need to add the appropriate CMSIS system_MKxxDZ10.c file to your project.
• Startup code now supplies a default weak SystemInit() function that disables the watchdog.

1.1

• Fixed Flash Vectors In RAM placement when the Enable Unused Symbol Removal property is enabled.

1.0

• Initial Release.

Documentation

Creating Kinetis Projects

To create a new Kinetis project

• Select the File > New > New Project menu item.
• Select the appropriate Generic Kinetis from the Categories list.
• Select the required project template type from the Templates list.
• Set the required project name and location directory.
• Click OK.

To build and debug an application the runs in Flash memory

• Select the project to work on by using the Project > Set Active Project menu option.
• Select the configuration you require by using the Build > Set Active Build Configuration menu option.
• Right click on the project node in the project explorer and select the Flash placement.
• Build the project by using the Build > Build Project menu option.
• Connect to the appropriate target in the target window.
• Download and start debugging the current project by using Debug > Start Debugging.

To make the application startup from reset

• Right click on the project node in the project explorer and select Properties...
• In the properties window scroll down to the Preprocessor Options section.
• Type STARTUP_FROM_RESET into the Preprocessor Definitions property editor.

Kinetis Project Specifics

Target Processor

Once a project has been created you can select different target processors by right clicking on the project node in the project explorer and selecting the Target Processor entry.

Selecting the target processor will specify the memory map that is used for the build and debug. You can view the selected memory map by right clicking on the project node in the project explorer and selecting View Memory Map or View Memory Map (as text).

Selecting the target processor will cause the preprocessor definition __TARGET_PROCESSOR to be set to the specified processor name when you compile the project.

Section Placement

CrossStudio for ARM supports Kinetis projects running applications in a number of different memory configurations. You can select the memory configuration you require by right clicking on the project node in the project explorer and selecting the Placement entry.

For Kinetis projects the set of placements are:

• Flash application runs in internal Flash memory.
• Flash Vectors In RAM application runs in internal Flash memory with exception vectors in RAM memory.
• Flash Copy To RAM application starts in internal flash and copies itself to run internal RAM memory.
• Flash Copy To RAM2 application starts in internal flash and copies itself to run in two RAM memory segments. Use the section placement macros property to specify the RAM names to copy to. For example RAM_NAME=DDR_CODE;RAM2_NAME=DDR_DATA_WB will copy the code into the DDR_CODE segment and the data into the DDR_DATA_WB segment.
• RAM application runs in internal RAM memory.

Stack and Heap Sizes

The stack and heap sizes are set to be 128 bytes by default when a project is created. This enables projects to run on the smallest of the Kinetis processors. It is likely that you will need to change these values when developing applications to run on the larger of the Kinetis processors.

Target Startup Code

The startup code Kinetis_Startup.s is common to all Kinetis processors. There are a set of preprocessor defines that configure the startup code and are documented in the startup file itself. The startup code calls out to symbol SystemInit with the stack pointer set to the top of RAM. The SystemInit function can be used to set the CPU clock or configure any external memories prior to the C initialisation code as such it cannot access initialised static data.

The startup code declares symoblic names (and weak implementations) for each interrupt service routine, for example the PORTA_IRQHandler function will be called when this interrupt occurs. If you are porting code that has application specific interrupt service routine names then you can use the preprocessor definitions to rename the symbol for example PORTA_IRQHandler=porta_isr.

Target Script

The script Kinetis_Target.js is used by the debugger to identify the Kinetis part, match the project to the target and to reset the target board.

Kinetis Internal Flash Loader

The source code to the flash loaders (click to load solution) for the internal Flash of the Kinetis is provided. Note that by default the Kinetis flash loaders will not program the flash configuration field (0x400-0x40C) you can rebuild the loaders with the preprocessor definition ALLOW_FCF_WRITE if you require this.

Memory Simulator

An Kinetis memory simulator is provided that simulates the memories of the various Kinetis devices. The memory simulation parameter (which is set by the Target Processor selection) specifies the device name, the size of the internal Flash and RAM memories.

CMSIS support

CMSIS header files are included as part of the new project setup. The file Kinetis.h is provided which selects the appropriate header file depending on the target processor selection.

CTL support

The file Kinetis_ctl.c implements the CTL system timer using the Cortex-M SysTick timer. The timer is configured to interrupt at a 10 millisecond rate and increment the CTL system timer by 10 to give a millisecond timer. The implementation uses the CMSIS SystemCoreClock global variable to determine the CPU clock frequency. The CTL samples that are provided in this package have board specific files that initialise this variable.

The CTL interrupt support functions ctl_global_interrupts_set, ctl_set_priority, ctl_unmask_isr and ctl_mask_isr are implemented in this file. The Cortex-M4 implementations uses the lowest half of the available NVIC priorities (top bit set in the priority) for CTL interrupts and disables global interrupts by raising the NVIC basepriority above the highest CTL priority. This enables you to use the upper half of the NVIC priorities for interrupts that do not use CTL and should not be disabled by CTL. The functions ctl_lowest_isr_priority, ctl_highest_isr_priority, and ctl_adjust_isr_priority are provided to assist with setting isr priorities.

OSJTAG firmware update

The package contains an update to the firmware that can be loaded on to the OSJTAG hardware of the TWR CPU modules. The updated firmware improves the download and debug performance of the CrossWorks 'Kinetis OSJTAG' target interface. You'll need to use the firmware update procedure available from PE micro and point the updater program at the supplied file osbdm-jm60_kinetis_rowley_101_0.s19. You can click on the above link to get a copy of the firmware into the editor and then right click on the editor tab and select 'Copy Full Path' to get the path to the filename of the firmware into the paste buffer.

Known problems

The part name identification and matching cannot be done for all Kinetis devices.