STMicroelectronics STM32 CPU Support Package
This package contains project templates and system files for the STMicroelectronics STM32.
CrossWorks Version 4 Installation Instructions
- To install this support package
-
- Click the Tools > Package Manager menu option to open the package manager window.
- Right click on the STMicroelectronics STM32 CPU Support Package entry and select Install Selected Packages.
- Click Next to take you to the summary page.
- Click Next to install the package.
- Click Finish to close the package manager window.
- Click the Tools > Show Installed Packages.
- Click on the STMicroelectronics STM32 CPU Support Package link to view the package and its contents.
- To manually install this support package
-
- If you have not done so already, follow the CMSIS 5 CMSIS-Core(M) Support Package, CMSIS 5 CMSIS-DSP Support Package, CMSIS 5 Support Package and CrossWorks Tasking Library Package installation instructions.
- Download the file STM32_V3.hzq using your web browser.
- Click the Tools > Manually Install Packages menu option.
- Select the file you have just downloaded to install the package.
- Click the Tools > Show Installed Packages.
- Click on the STMicroelectronics STM32 CPU Support Package link to view the package and its contents.
- To install this support package using other versions
Release Notes
3.40
- Fixed flash loader for STM32H730/STM32H750 devices.
- Fixed flash loader for STM32H7*_CM4 devices.
- Add support for Cortex-M0+ in STM32WL5x devices.
3.39
- Fixed target identification for STM32F765 devices.
- Fixed bitfield display order of registers in register windows.
3.38
- Fixed property group define for STM32H730xB devices with SMPS.
3.37
- Add support for STM32G050/STM32G051/STM32G061 devices.
- Add support for STM32U5 devices.
- Add support for STM32H7B0AB device.
- Add support for STM32L496WG device.
- Add support for STM32WB10CC/STM32WB15CC/STM32WB30CE/STM32WB50CG/STM32WB5MMG devices.
- Fix SRAM definitions for STM32G4 memory map files.
- Supplied V1.4.1 ST CMSIS files for STM32G0 targets.
- Supplied V1.10.0 ST CMSIS files for STM32H7 targets.
- Supplied V1.9.2 ST CMSIS files for STM32L0 targets.
- Supplied V2.3.2 ST CMSIS files for STM32L1 targets.
- Supplied V1.9.0 ST CMSIS files for STM32WB targets.
- Supplied V1.1.0 ST CMSIS files for STM32WL targets.
3.36
- Fixed "Erase All" with STM32G0 flash loader.
3.35
- Add Option and Engineering bytes segments to STM32G0 memory maps.
- Fix register descriptions in peripheral register files.
- Add support for STM32WL5/STM32WLE devices.
3.34
- Add support for STM32F723VC.
- Add support for STM32H750ZB/STM32H7B0 devices.
- Add support for STM32G031/STM32G041/STM32G070KB/STM32G081RB/STM32G0B0/STM32G0C1 devices.
- Add support for STM32G431/STM32G441/STM32G473/STM32G474/STM32G483/STM32G491 devices.
- Add support for STM32L062C8.
- Add support for STM32L151VDxxX/STM32L152VDxxX/STM32L162QC/STM32L162VDxxX/STM32L162ZC devices.
- Add support for STM32WB35/STM32WB55VY devices.
- Supplied V2.3.5 ST CMSIS files for STM32F0 targets.
- Supplied V4.3.2 ST CMSIS files for STM32F1 targets.
- Supplied V2.2.4 ST CMSIS files for STM32F2 targets.
- Supplied V2.3.5 ST CMSIS files for STM32F3 targets.
- Supplied V2.6.6 ST CMSIS files for STM32F4 targets.
- Supplied V1.2.6 ST CMSIS files for STM32F7 targets.
- Supplied V1.4.0 ST CMSIS files for STM32G0 targets.
- Supplied V1.2.1 ST CMSIS files for STM32G4 targets.
- Supplied V1.9.1 ST CMSIS files for STM32L0 targets.
- Supplied V2.3.1 ST CMSIS files for STM32L1 targets.
- Supplied V1.7.1 ST CMSIS files for STM32L4 targets.
- Supplied V1.0.4 ST CMSIS files for STM32L5 targets.
- Supplied V1.8.0 ST CMSIS files for STM32WB targets.
- Add support for dual/single bank flash loading for STM32G0/STM32G4/STM32L4.
- Fix STM32G0/STM32L100RBxxA/STM32L4R9ZI memory maps.
- Fix STM32G471xx/STM32L552xx/STM32L562xx vector files.
3.33
- Fixed part name detection in STM32H7_Target.js.
- Add support for STM32H723/STM32H725/STM32H730/STM32H733/STM32H735 devices.
3.32
- Add support for STM32L4P5/STM32L4Q5 devices.
3.31
- Add STM32 External GCC Built Executable project template.
- Add support for STM32L552/STM32L562 devices.
- Add support for STM32H7A3/STM32H7B3 devices.
- Supplied V2.3.4 ST CMSIS files for STM32F0 targets.
- Supplied V4.3.1 ST CMSIS files for STM32F1 targets.
- Supplied V2.2.2 ST CMSIS files for STM32F2 targets.
- Supplied V2.3.4 ST CMSIS files for STM32F3 targets.
- Supplied V2.6.3 ST CMSIS files for STM32F4 targets.
- Supplied V1.2.4 ST CMSIS files for STM32F7 targets.
- Supplied V1.1.0 ST CMSIS files for STM32G0 targets.
- Supplied V1.7.0 ST CMSIS files for STM32H7 targets.
- Supplied V2.3.0 ST CMSIS files for STM32L1 targets.
- Supplied V1.6.0 ST CMSIS files for STM32L4 targets.
- Supplied V1.3.0 ST CMSIS files for STM32WB targets.
3.30
- STM32H7 targets now use target script STM32H7_Target.js.
- The Reset script in the STM32H7_Target.js will stop both cores on dual core devices.
3.29
- Add SWO support in STM32H7_Target.js.
- Add support for STM32G030/STM32G031/STM32G041 devices.
- Flash loaders now keep the IWDG alive.
3.28
- Add support for latest STM32H742/STMH743 and new STM32H745/STM32H747/STM32H755/STM32H757 devices.
3.27
- Add support for STM32G4 devices.
3.26
- Add support for STM32F730/STM32F750 and STM32H750 devices.
- Add STM32H7 specific target script (STM32H7_Target.js) that enables usage of the STM32H7 ETB.
- Fixed addresses of FMSC controller registers and added AHB3 RCC registers to STM32F412 peripheral file.
- Fixed names of GPIOx registers in STM32H7x3 peripheral file.
- Added missing channel 2 bit definitions to DAC CR register in STM32L0x2 and STM32L0x3 peripheral files.
- Fixed SRAM sizes of STM32F401xD/STM32F401xE/STM32F411xC/STM32F411xE memory map files.
- Fixed OPTION/OTP/SYSTEM memory segments in STM32F7xx memory map files.
3.25
- Add support for STM32G0x0 devices.
3.24
- Add support for STM32L010, STM32L412 and STM32L422 devices.
- Fixed memory maps for STM32H7 targets.
3.23
- Add quadspi and octospi support to memory map files.
- New projects will use CMSIS-Core property group to select CMSIS headers.
- Add support for STM32WB55xx devices.
3.22
- Fixed target properties for STM32L082CZ.
- Add support for flash loading of STM32F76/STM32F77 devices when nDBANK=0 is set.
- Add support for flash loading of STM32F496/STM32F476 devices when DB1M=1 is set.
3.21
- Fixed SRAM sizes in STM32L47x/STM32L48x/STM32L49x/STM32L48x/STML4Ax memory maps.
- Supplied V1.2.2 ST CMSIS files for STM32F7 targets.
- Supplied V1.2.0 ST CMSIS files for STM32H7 targets.
- Supplied V1.4.2 ST CMSIS files for STM32L4 targets.
3.20
- Add support for STM32L4S, STM32L4R devices.
- Supplied V2.3.3 ST CMSIS files for STM32F0 targets.
- Supplied V4.2.0 ST CMSIS files for STM32F1 targets.
- Supplied V2.2.1 ST CMSIS files for STM32F2 targets.
- Supplied V2.3.2 ST CMSIS files for STM32F3 targets.
- Supplied V2.6.2 ST CMSIS files for STM32F4 targets.
- Supplied V1.2.1 ST CMSIS files for STM32F7 targets.
- Supplied V1.1.0 ST CMSIS files for STM32H7 targets.
- Supplied V1.7.2 ST CMSIS files for STM32L0 targets.
- Supplied V2.2.2 ST CMSIS files for STM32L1 targets.
- Supplied V1.4.1 ST CMSIS files for STM32L4 targets.
3.19
- Add support for STM32L451, STM32L452, STM32L462, STM32L496 and STM32L4A6 devices.
- Fixed 1MB limit of STM32F7x5/STM32F7x6/STM32F7x8/STM32F7x9 flash loader.
3.18
- Add support for STM32F423, STM32F72x/73x, STM32H7x3 devices.
- Supplied V2.3.2 ST CMSIS files for STM32F0 targets.
- Supplied V2.2.0 ST CMSIS files for STM32F2 targets.
- Supplied V2.6.1 ST CMSIS files for STM32F4 targets.
- Supplied V2.2.1 ST CMSIS files for STM32L1 targets.
- Supplied V1.3.1 ST CMSIS files for STM32L4 targets.
3.17
- Add support for STM32F413 devices.
- Supplied V2.3.1 ST CMSIS files for STM32F0 targets.
- Supplied V2.3.1 ST CMSIS files for STM32F3 targets.
- Supplied V2.6.0 ST CMSIS files for STM32F4 targets.
- Supplied V1.2.0 ST CMSIS files for STM32F7 targets.
- Supplied V1.7.1 ST CMSIS files for STM32L0 targets.
- Supplied V1.2.0 ST CMSIS files for STM32L4 targets.
3.16
- Added support for flash loading to STM32F7xx ITCM Flash.
3.15
- Fixed STM32L4 flash loader with devices that have unprogrammed flash.
- Fixed SRAM sizes in the STM32F7xx memory maps.
- Fixed NVIC bit field displays in debugger watch windows.
3.14
- Add support for STM32F071C8, STM32F469/479, STM32F76x/77x, STM32L07x and STM32L43x devices.
- Fixed EEPROM and SRAM sizes in memory maps of STM32L devices.
3.13
- Add support for STM32F412 devices.
- Supplied V2.3.0 ST CMSIS files for STM32F0 targets.
- Supplied V2.1.2 ST CMSIS files for STM32F2 targets.
- Supplied V2.5.1 ST CMSIS files for STM32F4 targets.
- Supplied V1.1.2 ST CMSIS files for STM32F7 targets.
- Supplied V1.7.0 ST CMSIS files for STM32L0 targets.
- Supplied V2.2.0 ST CMSIS files for STM32L1 targets.
- Supplied V1.1.2 ST CMSIS files for STM32L4 targets.
3.12
- Add support for latest STM32L0x1 devices.
3.11
- Add support for STM32F765 devices.
- Supplied V4.1.0 ST CMSIS files for STM32F1 targets.
- Supplied V2.3.0 ST CMSIS files for STM32F3 targets.
- Supplied V1.1.0 ST CMSIS files for STM32F7 targets.
- Supplied V1.6.0 ST CMSIS files for STM32L0 targets.
- Supplied V1.1.1 ST CMSIS files for STM32L4 targets.
- Fixed hardfault enabling RUNFAST_MODE on the FPU on STM32F7 targets.
- Corrected vector file selection for STM32F030xC devices.
- Vector files for STM32F1 devices now generated from CMSIS header files.
3.10
- Add support for STM32F7x7 and STM32F7x9 devices.
- Add support for STM32L4x2, STM32L4x3, STM32L4x1 and STM32L4x5 devices.
- Fixed start address of COMP register block in STM32L07x_Peripherals.xml.
- Fixed bitfields of RTC_OR register in STM32F7xx_Peripherals.xml.
- Removed __FPU_PRESENT define in propertyGroups.xml.
- Improved part name detection and matching for STM32F030 and STM32F070 devices.
- Supplied V1.1.0 ST CMSIS files for STM32L4 targets.
3.9
- Added Flash TCM section placement for STM32F7 and STM32F3 devices with CCM.
- Supplied V2.2.3 ST CMSIS files for STM32F0 targets.
- Supplied V4.0.2 ST CMSIS files for STM32F1 targets.
- Supplied V2.4.3 ST CMSIS files for STM32F4 targets.
- Supplied V1.5.0 ST CMSIS files for STM32L0 targets.
- Supplied V1.0.3 ST CMSIS files for STM32L4 targets.
3.8
- Added support for STM32L071, STM32L072, STM32L073 and STM32L083 devices.
3.7
- Fixed simulated RCC register offsets.
- Added support for STM32F410 targets.
- Supplied V2.1.1 ST CMSIS files for STM32F2 targets. Note that GPIO BSSRL/BSSRH definitions have been combined into a single BSRR definition.
- Supplied V2.2.0 ST CMSIS files for STM32F3 targets. . Note that GPIO BSSRL/BSSRH definitions have been combined into a single BSRR definition.
- Supplied V2.4.2 ST CMSIS files for STM32F4 targets.
- Supplied V1.0.3 ST CMSIS files for STM32F7 targets.
- Supplied V1.4.0 ST CMSIS files for STM32L0 targets.
- Supplied V2.1.2 ST CMSIS files for STM32L1 targets.
- Supplied V1.0.2 ST CMSIS files for STM32L4 targets.
- Changed the "Connect With Reset" project property to "No" on new project creation.
3.6
- Added support for STM32F469, STM32F479 targets.
- Supplied V2.4.1 ST CMSIS files for STM32F4 targets.
3.5
- Added support for STM32L476, STM32F745 and STM32F746 targets.
- Supplied V2.2.2 ST CMSIS files for STM32F0 targets.
- Supplied V4.0.1 ST CMSIS files for STM32F1 targets.
- Supplied V2.4.0 ST CMSIS files for STM32F4 targets.
- Fixed enabling low power debug for Cortex-M0 devices.
- Fixed ROM table detection for Cortex-M0 devices when connecting with reset.
- CMSIS-CORE package is used for new projects. Existing projects can rename project property file/directory references from $(TargetsDir)/CMSIS_3 to $(PackagesDir)/CMSIS_4 if required.
3.4
- Added support for STM32F446 and STM32F756 targets.
- Supplied V2.2.1 ST CMSIS files for STM32F0 targets.
- Supplied V4.0.0 ST CMSIS files for STM32F1 targets.
- Supplied V2.3 ST CMSIS files for STM32F4 targets.
- Supplied V2.1.1 ST CMSIS files for STM32L1 targets.
3.3
- Add support for STM32F038, STM32F048, STM32F058, STM32F070, STM32F078, STM32F091 and STM32F098 targets.
- Supplied V2.2 ST CMSIS files for STM32F0 targets. Note that GPIO BSSRL/BSSRH definitions have been combined into a single BSRR definition.
- Supplied V2.1 ST CMSIS files for STM32F3 targets.
- Supplied V2.2 ST CMSIS files for STM32F4 targets. Note that GPIO BSSRL/BSSRH definitions have been combined into a single BSRR definition.
- Supplied V2.0.0 ST CMSIS files for STM32L1 targets. Note that the SystemInit() for this target no longer sets the clocks. This will have to be done in the application.
3.2
- Fixed name of register definition file for STM32L052, STM32L053 and STM32L063 targets.
- Added support for STM32F334 and STM32F411 targets.
- Supplied V2.0.0 ST CMSIS files for STM32F0, STM32F2, STM32F3, STM32F4 targets.
- Supplied V1.1.0 ST CMSIS files for STM32L0 targets.
- Vector files are now generated from the ST CMSIS header files for STM32F0, STM32F2, STM32F3, STM32F4 and STM32L0 targets.
3.1
- Fixed loader for 128K STM32F0 parts.
3.0
- Initial release for CrossWorks V3.
Documentation
Creating STM32 Projects
To create a new STM32 project
- Select the File > New > New Project menu item.
- Select the appropriate Generic STM32 from the Categories list.
- Select the required project template type from the Templates list.
- Set the required project name and location directory.
- Click OK.
To build and debug an application the runs in Flash memory
- Select the project to work on by using the Project > Set Active Project menu option.
- Select the configuration you require by using the Build > Set Active Build Configuration menu option.
- Right click on the project node in the project explorer and select the Flash placement.
- Build the project by using the Build > Build Project menu option.
- Connect to the appropriate target in the target window.
- Download and start debugging the current project by using Debug > Start Debugging.
To make the application startup from reset
- Right click on the project node in the project explorer and select Properties...
- In the properties window scroll down to the Preprocessor Options section.
- Type STARTUP_FROM_RESET into the Preprocessor Definitions property editor.
STM32 Project Specifics
Target Processor
Once a project has been created you can select different target processors by right clicking on the project node in the project explorer and selecting the Target Processor entry.
Selecting the target processor will specify the memory map that is used for the build and debug. You can view the selected memory map by right clicking on the project node in the project explorer and selecting View Memory Map or View Memory Map (as text).
Selecting the target processor will cause the appropriate preprocessor definition to be defined for use with the ST CMSIS header file.
For devices that have an FPU the preprocessor definition __FPU_PRESENT is defined.
Section Placement
CrossStudio for ARM supports STM32 projects running applications in a number of different memory configurations. You can select the memory configuration you require by right clicking on the project node in the project explorer and selecting the Placement entry.
For STM32 projects the set of placements are:
- Flash application runs in internal Flash memory.
- Flash Vectors In RAM application run in internal Flash memory exception vectors are copied to RAM memory.
- Flash Copy To RAM application starts in internal flash and copies itself to run internal RAM memory.
- RAM application runs internal RAM memory.
- Flash TCM application runs in internal Flash memory with specified code and data in TCM RAMS.
Stack and Heap Sizes
The stack and heap sizes are set to be 128 bytes by default when a project is created. This enables projects to run on the smallest of the STM32 processors. It is likely that you will need to change these values when developing applications to run on the larger of the STM32 processors.
Target Startup Code
The startup code STM32_Startup.s is common to all STM32F and STM32L processors. There are a set of preprocessor defines that configure the startup code and are documented in the startup file itself. The startup code calls out to a weak symbol SystemInit with the stack pointer set to the top of RAM. The SystemInit function can be used to set the CPU clock or configure any external memories prior to the C initialisation code as such it cannot access initialised static data.
The startup code declares symoblic names (and weak implementations) for each interrupt service routine, for example the EXTI0_IRQHandler function will be called when this interrupt occurs. If you are porting code that has application specific interrupt service routine names then you can use the preprocessor definitions to rename the symbol for example EXTI0_IRQHandler=MyEXTI0ISR.
Target Script
The target script STM32_Target.js is used by the debugger to reset the target board.
The target script will program the DBGMCU register so that the STM32 watchdog timers are stopped when in debug mode and the STM32 lower-power mode debugging is enabled.
The target script provides some support for programming the USER option byte of the STM32F10x, STM32L and STM32F2xx/STM32F4xx. To use these you should:
- Connect to the appropriate target.
- Use View | Script Console to display the script console.
- In the script console type load("targets/STM32/STM32_Target.js") which should return true on success.
For STM32F10x targets:
- STM32F_EraseOptionBytes() which will erase all of the option bytes - this function must be called first.
- STM32F_Unprotect() to disable read protection - this function should be called unless you want to enable read protection.
- STM32F_SetUSER(b) and pass the desired USER byte value as the argument.
- STM32F_SetData0(b) and pass the desired user Data0 byte value as the argument.
- STM32F_SetData1(b) and pass the desired user Data1 byte value as the argument.
For STM32L targets:
- STM32L_SetUSER(b) and pass the desired USER byte value as the argument.
For STM32F2xx/STM32F4xx targets:
- STM32F2xx_SetUSER(b) and pass the desired USER byte value as the argument.
You should then disconnect the target interface and power cycle the board.
STM32L EEPROM Support
The STM32L memory map files and flash loader supports loading the EEPROM which can be used as follows:
extern unsigned eevar __attribute__ ((section(".eeprom")));
unsigned eevar = 12;
CCM/TCM Support
You should select the Flash TCM placement. To place code for ITCM in the section .text_tcm you can use the following:
void onTimer(void)__attribute__ ((section(".text_tcm")));
or you can set the project property Code Section Name to .text_tcm on the compilation units that you wish to be placed in ITCM. To place zeroed data you can use the following:
extern unsigned zeroed __attribute__ ((section(".bss_tcm")));
unsigned zeroed;
or you can set the project property Zeroed Section Name to .bss_tcm on the compilation units that you wish to be placed in DTCM. To place initialised data you can use the following:
extern unsigned initialised __attribute__ ((section(".data_tcm")));
unsigned initialised=12;
or you can set the project property Data Section Name to .data_tcm on the compilation units that you wish to be placed in DTCM.
When using the STM32F3 devices with CCM you can use the Section Placement Macros project property as follows ITCM_NAME=CCM_RAM;DTCM_NAME=CCM_RAM to enable usage of the above TCM support.
STM32F7 ITCM Flash Support
When using the STM32F7 devices you can use the Section Placement Macros project property as follows FLASH_NAME=ITCM_FLASH to locate the code in ITCM flash memory.
Memory Simulator
An STM32 memory simulator is provided that simulates the memories of the various STM32 devices. The memory simulation parameter (which is set by the Target Processor selection) specifies the device name, the size of the internal Flash and RAM memories and then optionally the sizes of 4 FSMC Flash/RAM memories.
CMSIS support
CMSIS header files and source are included as part of the new project setup.
Known problems
The "Connect With Reset" project property doesn't work with the original ST-LINK and also causes the part name detection to fail on Cortex-M0 devices.