; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
; RUN:  -mcpu=pwr9 < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
; RUN:  -mcpu=pwr9 < %s | FileCheck %s

@vull = common global <2 x i64> zeroinitializer, align 16
@vuc = common global <16 x i8> zeroinitializer, align 16
@res_vull = common global <2 x i64> zeroinitializer, align 16

define void @test1() {
; CHECK-LABEL: test1:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    addis 3, 2, .LC0@toc@ha
; CHECK-NEXT:    ld 3, .LC0@toc@l(3)
; CHECK-NEXT:    lxv 34, 0(3)
; CHECK-NEXT:    addis 3, 2, .LC1@toc@ha
; CHECK-NEXT:    ld 3, .LC1@toc@l(3)
; CHECK-NEXT:    lxv 35, 0(3)
; CHECK-NEXT:    addis 3, 2, .LC2@toc@ha
; CHECK-NEXT:    ld 3, .LC2@toc@l(3)
; CHECK-NEXT:    vbpermd 2, 2, 3
; CHECK-NEXT:    stxv 34, 0(3)
; CHECK-NEXT:    blr
entry:
  %0 = load <2 x i64>, ptr @vull, align 16
  %1 = load <16 x i8>, ptr @vuc, align 16
  %2 = call <2 x i64> @llvm.ppc.altivec.vbpermd(<2 x i64> %0, <16 x i8> %1)
  store <2 x i64> %2, ptr @res_vull, align 16
  ret void
}
declare <2 x i64> @llvm.ppc.altivec.vbpermd(<2 x i64>, <16 x i8>)
