<html><head><meta name="color-scheme" content="light dark"></head><body><pre style="word-wrap: break-word; white-space: pre-wrap;">diff -rupN binutils/intl/configure binutils.patched/intl/configure
--- binutils/intl/configure	2020-06-22 01:15:18.000000000 +0100
+++ binutils.patched/intl/configure	2021-08-10 14:35:46.637018781 +0100
@@ -6485,8 +6485,8 @@ $as_echo "$gt_cv_func_gnugettext2_libint
       if test "$nls_cv_use_gnu_gettext" = "yes"; then
                 BUILD_INCLUDED_LIBINTL=yes
         USE_INCLUDED_LIBINTL=yes
-        LIBINTL="\${top_builddir}/intl/libintl.a $LIBICONV"
-        LTLIBINTL="\${top_builddir}/intl/libintl.a $LTLIBICONV"
+        LIBINTL="-L\${top_builddir}/intl -lintl $LIBICONV"
+        LTLIBINTL="-L\${top_builddir}/intl -lintl $LTLIBICONV"
         LIBS=`echo " $LIBS " | sed -e 's/ -lintl / /' -e 's/^ //' -e 's/ $//'`
       fi
 
diff -rupN binutils/gas/ChangeLog.rej binutils.patched/gas/ChangeLog.rej
--- binutils/gas/ChangeLog.rej	1970-01-01 01:00:00.000000000 +0100
+++ binutils.patched/gas/ChangeLog.rej	2021-11-02 10:48:25.518117585 +0000
@@ -0,0 +1,15 @@
+--- a/gas/ChangeLog
++++ b/gas/ChangeLog
+@@ -1,3 +1,12 @@
++2021-10-28  Markus Klein  &lt;markus.klein@sma.de&gt;
++
++	PR 28436
++	* config/tc-arm.c (do_vfp_nsyn_push_pop_check): New function.
++	(do_vfp_nsyn_pop): Use the new function.
++	(do_vfp_nsyn_push): Use the new function.
++	* testsuite/gas/arm/v8_1m-mve.s: Add new instructions.
++	* testsuite/gas/arm/v8_1m-mve.d: Updated expected disassembly.
++
+ 2021-09-27  Nick Alcock  &lt;nick.alcock@oracle.com&gt;
+ 
+ 	* configure: Regenerate.
diff -rupN binutils/gas/config/tc-arm.c binutils.patched/gas/config/tc-arm.c
--- binutils/gas/config/tc-arm.c	2021-06-01 01:15:16.000000000 +0100
+++ binutils.patched/gas/config/tc-arm.c	2021-11-02 10:48:25.530117753 +0000
@@ -20708,19 +20708,31 @@ do_neon_ldm_stm (void)
 }
 
 static void
+do_vfp_nsyn_push_pop_check (void)
+{
+  constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, fpu_vfp_ext_v1xd), _(BAD_FPU));
+
+  if (inst.operands[1].issingle)
+    {
+      constraint (inst.operands[1].imm &lt; 1 || inst.operands[1].imm &gt; 32,
+		  _("register list must contain at least 1 and at most 32 registers"));
+    }
+  else
+    {
+      constraint (inst.operands[1].imm &lt; 1 || inst.operands[1].imm &gt; 16,
+		  _("register list must contain at least 1 and at most 16 registers"));
+    }
+}
+
+static void
 do_vfp_nsyn_pop (void)
 {
   nsyn_insert_sp ();
-  if (ARM_CPU_HAS_FEATURE (cpu_variant, mve_ext)) {
-    return do_vfp_nsyn_opcode ("vldm");
-  }
 
-  constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, fpu_vfp_ext_v1xd),
-	      _(BAD_FPU));
+  if (ARM_CPU_HAS_FEATURE (cpu_variant, mve_ext))
+    return do_vfp_nsyn_opcode ("vldm");
 
-  constraint (inst.operands[1].imm &lt; 1 || inst.operands[1].imm &gt; 16,
-	      _("register list must contain at least 1 and at most 16 "
-		"registers"));
+  do_vfp_nsyn_push_pop_check ();
 
   if (inst.operands[1].issingle)
     do_vfp_nsyn_opcode ("fldmias");
@@ -20732,16 +20744,11 @@ static void
 do_vfp_nsyn_push (void)
 {
   nsyn_insert_sp ();
-  if (ARM_CPU_HAS_FEATURE (cpu_variant, mve_ext)) {
-    return do_vfp_nsyn_opcode ("vstmdb");
-  }
 
-  constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, fpu_vfp_ext_v1xd),
-	      _(BAD_FPU));
+  if (ARM_CPU_HAS_FEATURE (cpu_variant, mve_ext))
+    return do_vfp_nsyn_opcode ("vstmdb");
 
-  constraint (inst.operands[1].imm &lt; 1 || inst.operands[1].imm &gt; 16,
-	      _("register list must contain at least 1 and at most 16 "
-		"registers"));
+  do_vfp_nsyn_push_pop_check ();
 
   if (inst.operands[1].issingle)
     do_vfp_nsyn_opcode ("fstmdbs");
@@ -20749,7 +20756,6 @@ do_vfp_nsyn_push (void)
     do_vfp_nsyn_opcode ("fstmdbd");
 }
 
-
 static void
 do_neon_ldr_str (void)
 {
diff -rupN binutils/gas/testsuite/gas/arm/v8_1m-mve.d binutils.patched/gas/testsuite/gas/arm/v8_1m-mve.d
--- binutils/gas/testsuite/gas/arm/v8_1m-mve.d	2020-06-12 14:50:24.000000000 +0100
+++ binutils.patched/gas/testsuite/gas/arm/v8_1m-mve.d	2021-11-02 10:48:25.530117753 +0000
@@ -25,3 +25,7 @@ Disassembly of section .text:
  *[0-9a-f]+:	ed91 fb00 	vldr	d15, \[r1\]
  *[0-9a-f]+:	edc1 fa00 	vstr	s31, \[r1\]
  *[0-9a-f]+:	edd1 fa00 	vldr	s31, \[r1\]
+ *[0-9a-f]+:	ed2d 0a20 	vpush	{s0-s31}
+ *[0-9a-f]+:	ed2d 0a10 	vpush	{s0-s15}
+ *[0-9a-f]+:	ecbd 0a10 	vpop	{s0-s15}
+ *[0-9a-f]+:	ecbd 0a20 	vpop	{s0-s31}
diff -rupN binutils/gas/testsuite/gas/arm/v8_1m-mve.s binutils.patched/gas/testsuite/gas/arm/v8_1m-mve.s
--- binutils/gas/testsuite/gas/arm/v8_1m-mve.s	2020-06-12 14:50:24.000000000 +0100
+++ binutils.patched/gas/testsuite/gas/arm/v8_1m-mve.s	2021-11-02 10:48:25.530117753 +0000
@@ -22,3 +22,8 @@ vstr d15,[r1]
 vldr d15,[r1]
 vstr s31,[r1]
 vldr s31,[r1]
+	
+vpush {s0-s31}		// -&gt; false error, is a valid command
+vpush {s0-s15}		// OK
+vpop {s0-s15}		// OK
+vpop {s0-s31}		// -&gt; false error, is a valid command
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