The assembler supports several modifiers when using symbol addresses in M32C instruction operands. The general syntax is the following:
These modifiers override the assembler’s assumptions about how big a symbol’s address is. Normally, when it sees an operand like ‘sym[a0]’ it assumes ‘sym’ may require the widest displacement field (16 bits for ‘-m16c’, 24 bits for ‘-m32c’). These modifiers tell it to assume the address will fit in an 8 or 16 bit (respectively) unsigned displacement. Note that, of course, if it doesn’t actually fit you will get linker errors. Example:
mov.w %dsp8(sym)[a0],r1 mov.b #0,%dsp8(sym)[a0]
This modifier allows you to load bits 16 through 23 of a 24 bit address into an 8 bit register. This is useful with, for example, the M16C ‘smovf’ instruction, which expects a 20 bit address in ‘r1h’ and ‘a0’. Example:
mov.b #%hi8(sym),r1h mov.w #%lo16(sym),a0 smovf.b
Likewise, this modifier allows you to load bits 0 through 15 of a 24 bit address into a 16 bit register.
This modifier allows you to load bits 16 through 31 of a 32 bit address into a 16 bit register. While the M32C family only has 24 bits of address space, it does support addresses in pairs of 16 bit registers (like ‘a1a0’ for the ‘lde’ instruction). This modifier is for loading the upper half in such cases. Example:
mov.w #%hi16(sym),a1 mov.w #%lo16(sym),a0 … lde.w [a1a0],r1