NXP LPC54000 CPU Support Package

This package contains project templates and system files for the NXP LPC54000.

CrossWorks Version 4 Installation Instructions

To install this support package
  1. Click the Tools > Package Manager menu option to open the package manager window.
  2. Right click on the NXP LPC54000 CPU Support Package entry and select Install Selected Packages.
  3. Click Next to take you to the summary page.
  4. Click Next to install the package.
  5. Click Finish to close the package manager window.
  6. Click the Tools > Show Installed Packages.
  7. Click on the NXP LPC54000 CPU Support Package link to view the package and its contents.
To manually install this support package
  1. If you have not done so already, follow the CMSIS 4 CMSIS-CORE Support Package, CMSIS 4 CMSIS-DSP Support Package and CrossWorks Tasking Library Package installation instructions.
  2. Download the file LPC54000.hzq using your web browser.
  3. Click the Tools > Manually Install Packages menu option.
  4. Select the file you have just downloaded to install the package.
  5. Click the Tools > Show Installed Packages.
  6. Click on the NXP LPC54000 CPU Support Package link to view the package and its contents.
To install this support package using other versions

Release Notes





Creating LPC54000 Projects

To create a new LPC54000 project
To build and debug an application the runs in Flash memory
To build and debug a dual-core application that runs in Flash memory

LPC54000 Project Specifics

Target Processor

Once a project has been created you can select different target processors by right clicking on the project node in the project explorer and selecting the Target Processor entry.

Selecting the target processor will specify the memory map that is used for the build and debug. You can view the selected memory map by right clicking on the project node in the project explorer and selecting Edit Memory Map.

Section Placement

CrossStudio for ARM supports LPC54000 projects running applications in a number of different memory configurations. You can select the memory configuration you require by setting the Section Placement property.

For LPC5410x projects the set of placements are:

Stack and Heap Sizes

The default stack and heap sizes are set to be 256 and 256 bytes by default when a project is created.

Target Startup Code

The startup code LPC54000_Startup.s is common to all LPC54000 processors. There are a set of preprocessor defines that configure the startup code and are documented in the startup file itself. The startup code calls out to a weak symbol SystemInit with the stack pointer set to the top of of SRAM. The SystemInit function can be used to set the CPU clock or configure any external memories prior to the C initialisation code as such it cannot access initialised static data. Note that the SystemInit() function is called with the stackpointer pointing to the end of the first block of SRAM.

The startup code declares symbolic names (and weak implementations) for each interrupt service routine, for example the GINT0_IRQHandler function will be called when the GINT interrupt occurs. If you are porting code that has different interrupt service routines names then you can use preprocessor definitions to rename the declared symbolic name for example GINT0_IRQHandler=GINT0ISR.

Target Reset Script

The reset script LPC5410x_Target.js is used by the debugger to reset the target board.

Memory Simulator

An LPC54000 memory simulator is provided that simulates the memories of the various LPC5410x devices. The memory simulation parameter (which is set by the Target Processor selection) specifies the device name, the size of the internal Flash and RAM memories. Note that the power api ROM is not simulated so you will have to modify the startup code by building with NO_SYSTEM_INIT defined.

CMSIS support

CMSIS header files and library are referenced as part of the new project setup.

CTL support

The file ctl_LPC54000.c implements the CTL system timer using the standard Cortex-M SysTick timer. The timer is configured to interrupt at approximately a 10 millisecond rate and increment the CTL system timer by 10 to give a millisecond timer.

The CTL interrupt support functions ctl_global_interrupts_set, ctl_set_priority, ctl_unmask_isr and ctl_mask_isr are implemented in this file. The implementation uses the lowest half of the available NVIC priorities (top bit set in the priority) for CTL interrupts.