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The PDP-11 version of as has a rich set of machine dependent options.
-mpic | -mno-picGenerate position-independent (or position-dependent) code.
The default is to generate position-independent code.
These options enables or disables the use of extensions over the base line instruction set as introduced by the first PDP-11 CPU: the KA11. Most options come in two variants: a -mextension that enables extension, and a -mno-extension that disables extension.
The default is to enable all extensions.
-mall | -mall-extensionsEnable all instruction set extensions.
-mno-extensionsDisable all instruction set extensions.
-mcis | -mno-cisEnable (or disable) the use of the commercial instruction set, which consists of these instructions: ADDNI, ADDN, ADDPI, ADDP, ASHNI, ASHN, ASHPI, ASHP, CMPCI, CMPC, CMPNI, CMPN, CMPPI, CMPP, CVTLNI, CVTLN, CVTLPI, CVTLP, CVTNLI, CVTNL, CVTNPI, CVTNP, CVTPLI, CVTPL, CVTPNI, CVTPN, DIVPI, DIVP, L2DR, L3DR, LOCCI, LOCC, MATCI, MATC, MOVCI, MOVC, MOVRCI, MOVRC, MOVTCI, MOVTC, MULPI, MULP, SCANCI, SCANC, SKPCI, SKPC,
SPANCI, SPANC, SUBNI, SUBN, SUBPI, and SUBP.
-mcsm | -mno-csmEnable (or disable) the use of the CSM instruction.
-meis | -mno-eisEnable (or disable) the use of the extended instruction set, which consists of these instructions: ASHC, ASH, DIV, MARK, MUL, RTT, SOB SXT, and XOR.
-mfis | -mkev11-mno-fis | -mno-kev11Enable (or disable) the use of the KEV11 floating-point instructions: FADD, FDIV, FMUL, and FSUB.
-mfpp | -mfpu | -mfp-11-mno-fpp | -mno-fpu | -mno-fp-11Enable (or disable) the use of FP-11 floating-point instructions: ABSF, ADDF, CFCC, CLRF, CMPF, DIVF, LDCFF, LDCIF, LDEXP, LDF, LDFPS, MODF, MULF, NEGF, SETD, SETF, SETI, SETL, STCFF, STCFI, STEXP, STF, STFPS, STST, SUBF, and TSTF.
-mlimited-eis | -mno-limited-eisEnable (or disable) the use of the limited extended instruction set: MARK, RTT, SOB, SXT, and XOR.
The -mno-limited-eis options also implies -mno-eis.
-mmfpt | -mno-mfptEnable (or disable) the use of the MFPT instruction.
-mmultiproc | -mno-multiprocEnable (or disable) the use of multiprocessor instructions: TSTSET and WRTLCK.
-mmxps | -mno-mxpsEnable (or disable) the use of the MFPS and MTPS instructions.
-mspl | -mno-splEnable (or disable) the use of the SPL instruction.
Enable (or disable) the use of the microcode instructions: LDUB, MED, and XFC.
These options enable the instruction set extensions supported by a particular CPU, and disables all other extensions.
-mka11KA11 CPU. Base line instruction set only.
-mkb11KB11 CPU. Enable extended instruction set and SPL.
-mkd11aKD11-A CPU. Enable limited extended instruction set.
-mkd11bKD11-B CPU. Base line instruction set only.
-mkd11dKD11-D CPU. Base line instruction set only.
-mkd11eKD11-E CPU. Enable extended instruction set, MFPS, and MTPS.
-mkd11f | -mkd11h | -mkd11qKD11-F, KD11-H, or KD11-Q CPU. Enable limited extended instruction set, MFPS, and MTPS.
-mkd11kKD11-K CPU. Enable extended instruction set, LDUB, MED, MFPS, MFPT, MTPS, and XFC.
-mkd11zKD11-Z CPU. Enable extended instruction set, CSM, MFPS, MFPT, MTPS, and SPL.
-mf11F11 CPU. Enable extended instruction set, MFPS, MFPT, and MTPS.
-mj11J11 CPU. Enable extended instruction set, CSM, MFPS, MFPT, MTPS, SPL, TSTSET, and WRTLCK.
-mt11T11 CPU. Enable limited extended instruction set, MFPS, and MTPS.
These options enable the instruction set extensions supported by a particular machine model, and disables all other extensions.
-m11/03Same as -mkd11f.
-m11/04Same as -mkd11d.
-m11/05 | -m11/10Same as -mkd11b.
-m11/15 | -m11/20Same as -mka11.
-m11/21Same as -mt11.
-m11/23 | -m11/24Same as -mf11.
-m11/34Same as -mkd11e.
-m11/34aAme as -mkd11e -mfpp.
-m11/35 | -m11/40Same as -mkd11a.
-m11/44Same as -mkd11z.
-m11/45 | -m11/50 | -m11/55 | -m11/70Same as -mkb11.
-m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94Same as -mj11.
-m11/60Same as -mkd11k.
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